电视机安全检验中的抗电强度试验

简要介绍了抗电强度试验在电视机的安全检验中的实际作用介绍了判定电流、升压方式的选择。     

浅述家用电器检测中的几个热点问题

检测工作将随着家电行业的发展而发展，近几年家电检测热点将主要集中EMC、CFC替代、能效标签及可靠性和国际经认等方面。     

HART协议物理层设备的测试(上)

本文介绍HART协议物理层设备的测试要求、测试设备、测试方法及测试时的一些特别说明。     

用一个初始状态生成伪穷尽测试集

本文给出了一种适合于级敏扫描方法（ＬＳＳＤ）的伪穷尽测试集生成方法。通过测试码生成电路中增加状态跳变控制电路，使得只需要一个初始状态就可生成整个伪穷尽测试集。由于这个特点，消除了必须在ＲＯＭ中存储多个初始状态的要求，从而简化了测试控制电路及测试过程。     

电话机来电显示电路CSC9270DGP的测试软件开发

本文介绍了电话机来电显示电路CSC9270DGP的测试原理和方法,CSC9270DGP是一个完整的双音多频接收电路,具有频带分离滤波器和数字解码功能。重点介绍了该电路在ETS－570大规模测试系统上的测试软件开发。CSC9270DGP是一个数模混和电路,有3／4是模拟部分,本文介绍了如何在数字系统上测试模拟电路的方法。     

基于FDR码改进分组的SoC测试数据压缩方法

文章提出一种基于FDR码改进分组的SoC测试数据压缩方法.经过对原始测试集无关位的简单预处理,提高确定位0在游程中的出现频率.在FDR码的基础上,改进其分组方式,通过理论证明其压缩率略高于FDR编码,尤其是短游程的压缩率.用C语言编写程序模拟两种编码方法的软件实现程序,实验结果证明了改进分组的FDR编码方法的有效性和高压缩性.     

MOS门电路测试过程中功率损耗最小化

MOS逻辑门电路的功率损耗与其门电路的输出翻转成正比。在测试过程中,输出节点反转速率远高于正常使用时,很容易造成电路损坏。因此,在测试过程中减少逻辑门输出翻转速率具有重要意义。文章提出减少MOS门输出翻转速率的一些方法,有助于有效解决这一问题。该方法具有实现简单、编程方便等优点。     

通用测试平台的讨论

文章着重从结构,管理,工具支持,测试人员的使用及平台的安全性等几个方面对如何建立可升级,参数化的通用测试平台提出一种解决方案,并努力使之具有普适性,以期指导更多的工程实践。     

Direct limits of infinite-dimensional Lie groups compared to direct limits in related categories

Let G be a Lie group which is the union of an ascending sequence G₁⊆G₂⊆? of Lie groups (all of which may be infinite-dimensional). We study the question when in the category of Lie groups, topological groups, smooth manifolds, respectively, topological spaces. Full answers are obtained for G the group Diffc(M) of compactly supported C^∞-diffeomorphisms of a σ-compact smooth manifold M; and for test function groups of compactly supported smooth maps with values in a finite-dimensional Lie group H. We also discuss the cases where G is a direct limit of unit groups of Banach algebras, a Lie group of germs of Lie group-valued analytic maps, or a weak direct product of Lie groups.     

Bipower-type estimation in a noisy diffusion setting

We consider a new class of estimators for volatility functionals in the setting of frequently observed Itō diffusions which are disturbed by i.i.d. noise. These statistics extend the approach of pre-averaging as a general method for the estimation of the integrated volatility in the presence of microstructure noise and are closely related to the original concept of bipower variation in the no-noise case. We show that this approach provides efficient estimators for a large class of integrated powers of volatility and prove the associated (stable) central limit theorems. In a more general Itō semimartingale framework this method can be used to define both estimators for the entire quadratic variation of the underlying process and jump-robust estimators which are consistent for various functionals of volatility. As a by-product we obtain a simple test for the presence of jumps in the underlying semimartingale.