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11.
BGA焊点的形态预测及可靠性优化设计   总被引:3,自引:3,他引:0  
制定了BGA(球栅阵列)焊点的形态预测以及可靠性分析优化设计方案,对完全分布和四边分布的两种BGA元件,通过改变下焊盘的尺寸得到不同钎料量的焊点,并对其形态进行了预测,建立了可靠性分析的三维力学模型。采用有限元方法分析了元件和焊点在热循环条件下的应力应变分布特征,预测了不同种类和不同形态的BGA焊点的热疲劳寿命,由此给出了最佳的上下焊盘比例范围。  相似文献   
12.
The phase size distributions (PSDs) of the Sn, Pb, and the combined Pb and Sn phases, and the shape factor δ were determined for as-reflowed 60Sn40Pb solder joints and following their annealing at 50°C to 150°C. The PSDs in all cases had a positive skew which was approximated by a log-normal function. The PSDs were time invariant and were in accord with the Bitti and Nunzio model for phase coarsening. The shape factor, δ, decreased with the mean of the combined Pb and Sn phase size, and with temperature. Whether or not δ affects the PSDs is not clear.  相似文献   
13.
阿达玛变换成像光谱术的研究   总被引:3,自引:0,他引:3  
本文论述了阿达玛变换成像光谱仪的基本原理,探讨了工作模式和若干设计问题,利用自行研制的实验装置,在可见波段获得了各种透明字形的成像光谱图。采用对称π变换和快速δ阿达玛变换,改善了实验数据的处理方法。  相似文献   
14.
Solder pastes used in surface mount soldering techniques (SMT) are very complex suspensions containing high volumes of metallic powder in a carrier fluid. The rheological complexity results largely from the carrier fluid itself, which is a suspension of colloidal particles. In this work, we have characterized the rheological properties of a typical carrier fluid and its solder paste containing 64 vol.% metallic powder. A six-blade vane geometry was used to avoid wall slip and sample fracture. All measurements were carried out following pre-shearing and rest time in order to obtain reproducible results. Steady shear experiments showed that the solder paste was highly shear-thinning and thixotropic. In oscillatory shear, the linear viscoelastic domain was found to be very narrow for both the suspending fluid and the paste. Frequency sweep tests in the linear domain revealed a gel-like structure with a nearly constant G′ for the suspending fluid and a slightly increasing G′ for the solder paste. From creep experiments, a yield stress of about 40 Pa was determined for the suspending fluid at temperatures between 25 and 40°C, and of 100 Pa at 4°C. A much larger yield stress, 480 Pa, was determined for the solder paste at 25°C.  相似文献   
15.
为从本质上分析阻焊剂剥离的原因,即光固化成分和热固化成分含量的差异,开展此试验。通过采用红外光谱检测阻焊油墨中环氧基以及丙烯基的含量,以衡量油墨的固化程度。并以此分析生产流程各环节对油墨固化程度的影响。通过研究不同的固化成分对阻焊剂结合力的影响,在业界开创了一种新的量化方法。  相似文献   
16.
感光阻焊与干膜析出物,是化镍金表面工艺金、镍缸控制寿命的原因之一,旨在改善黑焊盘缺陷。由于阻焊、干膜种类繁多,且阻焊、干膜与化镍金药水属于不同公司或厂家,鉴于配方专利等原因,单方对其相互影响原理甚至现象鲜有研究,此方面文献更是屈指可数。本文简述了"黑焊盘"发生的基本原理,并利用干膜以及不同阻焊油墨进行试验,通过测量镍金层厚度评估干膜与油墨对化镍金工艺的影响。通过机理验证试验,验证阻焊油墨析出物抑制化镍反应,而非目前业界所认知的加速反应。本实验一则为PCB厂家提供经验数据,利于生产控制;二则抛砖引玉,促进阻焊油墨、干膜、化镍金药水及PCB厂家对其进一步研究。  相似文献   
17.
ShiGang Wu  Feng Zhang 《Optik》2011,122(1):1-5
Structures, spectra and surface topographies of as-deposited and annealed AgOx films have been investigated by an X-ray diffractometer, a spectrophotometer and an atomic force microscopy (AFM). X-ray diffraction and spectrum results show that the as-deposited AgOx films with high oxygen ratios (x≥0.5) are in amorphous states and Ag crystalline particles will separate out after annealed. AFM results show that the film surface will become much rougher and film thickness will increase greatly after annealed due to the decomposition of AgOx with release of oxygen. Static recording results show that two microstructures of the recording marks can be produced: one is the bubble mark at a low recording power and the other is the rupture bubble with an ablated aperture (hole) in the center at a high recording power. Based on the formation of rupture bubble marks, the near-field optical distribution of a focused Gaussian laser beam through a sub-wavelength aperture (200 nm in diameter) has been simulated using finite-difference-time-domain (FDTD) method. Results show that the spot size can be greatly squeezed with still highly transmitted intensity, which may lead to the super-resolution readout.  相似文献   
18.
Binary 3-point scheme, developed by Hormann and Sabin [Hormann, K. and Sabin, Malcolm A., 2008, A family of subdivision schemes with cubic precision, Computer Aided Geometric Design, 25, 41-52], has been modified by introducing a tension parameter which generates a family of C1 limiting curves for certain range of tension parameter. Ternary 3-point scheme, introduced by Siddiqi and Rehan [Siddiqi, Shahid S. and Rehan, K., 2009, A ternary three point scheme for curve designing, International Journal of Computer Mathematics, In Press, DOI: 10.1080/00207160802428220], has also been modified by introducing a tension parameter which generates family of C1 and C2 limiting curves for certain range of tension parameter. Laurent polynomial method is used to investigate the continuity of the subdivision schemes. The performance of modified schemes has been demonstrated by considering different examples along with its comparison with the established subdivision schemes.  相似文献   
19.
The underfill flow process is one of the important steps in Microsystems technology. One of the best known examples of such a process is with the flip-chip packaging technology which has great impact on the reliability of electronic devices. For optimization of the design and process parameters or real-time feedback control, it is necessary to have a dynamic model of the process that is computationally efficient yet reasonably accurate. The development of such a model involves identifying any factors that can be neglected with negligible loss of accuracy. In this paper, we present a study of flow transient behavior and flow resistance due to the presence of an array of solder bumps in the gap. We conclude (1) that the assumption of steady flow in the modeling of the flow behavior of fluids in the flip-chip packaging technology is reasonable, and (2) the solder bump resistance to the flow can not be neglected when the clearance between any two solder bumps is less than 60-70 μm. We subsequently present a new model, which extends the one proposed by Han and Wang in 1997 by considering the solder bump resistance to the flow.  相似文献   
20.
VLSI版图验证算法的固化研究   总被引:1,自引:1,他引:0  
恽峰  宗华 《电子学报》1996,24(2):32-36
VLSI电路芯片集成度的不断增加,使得设计趋于复杂化,这就对版图验证工具的处理能力与性能提出了进一步的要求,运用特殊的硬件将版图验证的某些算法固化,利用其中内在的并行性来获得处理速度的提高是一类非常有效的方法,本文提出了一种用于在版图验证算法中得到广泛运用的线扫描算法中边排序操作的硬件实现。并且在FPGA上进行了验证,整个系统实现于一块PC机的扩展卡上,测试的结果表明,对于排序的操作,硬件实现的速  相似文献   
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