Non-Selective SiGe Graphic Epitaxial by MBE

To handle the thermal budget in SiGe BiCMOS process, a nonselective graphic epitaxial technology using molecular beam epitaxial (MBE) has been developed. SEM, AFM, XRD, and dislocation density measurements are carried out. The SiGe film's RMS roughness is 0.45nm, and dislocation density is 0.3×103cm2～1.2×103cm2. No dislocation accumulation exists on the boundary of the windows; this indicates the high quality of the SiGe film. The experiment results show that the technology presented in this paper meets the fabrication requirements of SiGe BiCMOS.     

Analysis of excimer laser annealing of amorphous SiGe on La2O3//Si structures

The reduction of complementary metal oxide semiconductor dimensions through transistor scaling is in part limited by the SiO₂ dielectric layer thickness. Among the materials evaluated as alternative gate dielectrics one of the leading candidate is La₂O₃ due to its high permittivity and thermodynamic stability. However, during device processing, thermal annealing can promote deleterious interactions between the silicon substrate and the high-k dielectric degrading the desired oxide insulating properties.The possibility to grow poly-SiGe on top of La₂O₃//Si by laser assisted techniques therefore seems to be very attractive. Low thermal budget techniques such as pulsed laser deposition and crystallization can be a good choice to reduce possible interface modifications due to their localized and limited thermal effect.In this work the laser annealing by ArF excimer laser irradiation of amorphous SiGe grown on La₂O₃//Si has been analysed theoretically by a numerical model based on the heat conduction differential equation with the aim to control possible modifications at the La₂O₃//Si interface. Simulations have been carried out using different laser energy densities (0.26-0.58 J/cm²), different La₂O₃ film thickness (5-20 nm) and a 50 nm, 30 nm thick amorphous SiGe layer. The temperature distributions have been studied in both the two films and substrate, the melting depth and interfaces temperature have been evaluated. The fluences ranges for which the interfaces start to melt have been calculated for the different configurations.Thermal profiles and interfaces melting point have shown to be sensitive to the thickness of the La₂O₃ film, the thicker the film the lower the temperature at Si interface.Good agreement between theoretical and preliminary experimental data has been found.According to our results the oxide degradation is not expected during the laser crystallization of amorphous Si_0.7Ge_0.3 for the examined ranges of film thickness and fluences.     

Segregation of phosphorus and germanium to grain boundaries in chemical vapor deposited silicon-germanium films determined by scanning transmission electron microscopy

The segregation of phosphorus and germanium to grain boundaries in P implanted, Si_0.87Ge_0.13 films deposited by chemical vapor deposition (CVD), was investigated using energy dispersive x-ray (EDX) micro-analysis. A quantitative analysis of the x-ray spectra obtained at grain boundaries showed that the excess amount of P varied with the crystallography of the boundary but that the segregation always followed an equilibrium process with an activation energy of 0.28 eV. On the other hand, Ge did not segregate to grain boundaries in either P implanted Si_0.87Ge_0.13 films nor in intrinsic Si_1−xGe_x films, containing 2, 13 and 31 at.% Ge. Possible reasons for the absence of Ge segregation are discussed.     

1.9～5.7 GHz宽带低噪声BiCMOS LC VCO

设计了一种宽带、低相位噪声差分LC压控振荡器(VCO)。所设计的电路采用开关电容阵列和开关电感,实现了多波段振荡输出。对负阻环节跨导进行了优化设计,将热噪声控制在最小范围内,同时采用高品质因数片上螺旋电感,以减小电路的噪声干扰。采用台积电(TSMC)0.35μmSiGe BiCMOS工艺制作了流片,并进行了仿真和硬件电路实验。实测结果表明,当调谐电压为0～3.3 V时,可设定VCO工作在6个波段(1.9～2.1 GHz,2.1～2.4 GHz,2.4～3.0 GHz,3.0～3.4 GHz,3.4～4.2 GHz,4.2～5.7 GHz),此6波段连续可调,构成了1.9～5.7 GHz宽带VCO;VCO的中心频率为2.4 GHz、偏离中心频率为1 MHz时实测相位噪声为-111.64 dBc/Hz;在3.3 V电源电压下实测核静态电流约为1.8 mA,从而验证了宽带、低噪声BiCMOS LC VCO设计方案之正确性。     

晶体管工作状态对SiGe带通滤波器的影响研究

采用SiGe异质结双极晶体管,设计了一种具有回转结构的带通跨导-电容滤波器.使用ADS软件进行电路图的仿真分析.研究镜像电流源的集电极电阻R对该滤波器中心频率、输出增益及功耗的影响.分析结果表明,镜像电流源集电极电阻R的调节可以控制镜像电流源的晶体管工作状态和回转电路的偏置电流.因此,要获得更高的中心频率,镜像电流源中直接给跨导单元提供电流的晶体管不用按常规工作在放大区而可以工作在饱和区.对滤波器输出增益和功耗的进一步分析结果表明,以上晶体管工作在饱和区不仅可以提高滤波器的工作频率,还可以提高滤波器的输出增益,但是也会同时增加滤波器的功耗.     

A 2.4 GHz power amplifier in 0.35μm SiGe BiCMOS

This paper presents a 2.4 GHz power amplifier(PA) designed and implemented in 0.35μm SiGe BiCMOS technology.Instead of chip grounding through PCB vias,a metal plate with a mesa connecting ground is designed to decrease the parasitics in the PCB,improving the stability and the gain of the circuit.In addition,a low-pass network for output matching is designed to improve the linearity and power capability.At 2.4 GHz,a P_(1dB) of 15.7 dBm has been measured,and the small signal gain is 27.6 dB with S_(11)<-7 ...     

A 2.1-6 GHz SiGe BiCMOS low-noise amplifier design for a multi-mode wideband receiver

正A wideband low-noise amplifier(LNA) with ESD protection for a multi-mode receiver is presented.The LNA is fabricated in a 0.18-μm SiGe BiCMOS process,covering the 2.1 to 6 GHz frequency band.After optimized noise modeling and circuit design,the measured results show that the LNA has a 12 dB gain over the entire bandwidth, the input third intercept point(IIP3) is -8 dBm at 6 GHz,and the noise figure is from 2.3 to 3.8 dB in the operating band.The overall power consumption is 8 mW at 2.5 V voltage supply.     

HfAlOx high-k gate dielectric on SiGe: Interfacial reaction, energy-band alignment, and charge trapping properties

Ultra thin HfAlO_x high-k gate dielectric has been deposited directly on Si_1−xGe_x by RF sputter deposition. The interfacial chemical structure and energy-band discontinuities were studied by using X-ray photoelectron spectroscopy (XPS), time of flight secondary ion mass spectroscopy (TOF-SIMS) and electrical measurements. It is found that the sputtered deposited HfAlO_x gate dielectric on SiGe exhibits excellent electrical properties with low interface state density, hysteresis voltage, and frequency dispersion. The effective valence and conduction band offsets between HfAlO_x (E_g = 6.2 eV) and Si_1−xGe_x (E_g = 1.04 eV) were found to be 3.11 eV and 2.05 eV, respectively. In addition, the charge trapping properties of HfAlO_x/SiGe gate stacks were characterized by constant voltage stressing (CVS).     

超结硅锗功率二极管电学特性的研究

超结SiGe功率开关二极管可以克服常规Si功率二极管存在的一些缺陷,如阻断电压增大的同时,正向导通压降也将增大,反向恢复时间也变长。该新型功率二极管有两个重要特点:一是由轻掺杂的p型柱和n型柱相互交替形成超结结构,代替传统功率二极管的n-基区;二是p+区采用很薄的应变SiGe材料。该器件可以同时实现高阻断电压、低正向压降和快速恢复的电学特性。与相同器件厚度的常规Si功率二极管相比较,反向阻断电压提高了42%,反向恢复时间缩短了40%,正向压降减小了约0.1V(正向电流密度为100A/cm2时)。应变SiGe层中Ge含量和器件的基区厚度是影响超结SiGe二极管电学特性的重要参数,详细分析了该材料参数和结构参数对正向导通特性、反向阻断特性和反向恢复特性的影响,为器件结构设计提供了实用的参考价值。     

薄膜SOI上SiGe HBT集电结耗尽电荷和电容改进模型

文章研究了SOI衬底上SiGe npn异质结晶体管集电结耗尽电荷和电容.根据器件实际工作情况,基于课题组前面的工作,对耗尽电荷和电容模型进行扩展和优化.研究结果表明,耗尽电荷模型具有更好的光滑性;耗尽电容模型为纵向耗尽与横向耗尽电容的串联,考虑了不同电流流动面积,与常规器件相比,SOI器件全耗尽工作模式下表现出更小的集电结耗尽电容,因此更大的正向Early电压;在纵向工作模式到横向工作模式转变的电压偏置点,耗尽电荷和电容的变化趋势发生改变.SOI薄膜上纵向SiGe HBT集电结耗尽电荷和电容模型的建立和扩展为毫米波SOI BiCMOS工艺中双极器件核心参数如Early电压、特征频率等的设计提供了有价值的参考. 关键词： 耗尽电容 SiGe HBT SOI