Impact of 100 MeV Au on the surface of relaxed Si0.5Ge0.5 alloy films studied by atomic force microscopy

We demonstrate a gradual surface modification process of relaxed Si_0.5Ge_0.5 alloy films by 100 MeV Au beam with fluence varying between 5 × 10¹⁰ and 1 × 10¹² ions/cm² at 80 K by means of atomic force microscopy (AFM). Presence of Ge quantum dots (QDs) was found in the virgin sample. The disappearance of the QDs were noticed when the samples were irradiated with a fluence of 5 × 10¹⁰ ions/cm². Craters were found developing at a fluence of 1 × 10¹¹ ions/cm². Apart from the evolution of the craters, blisters were also detected at a fluence of 1 × 10¹² ions/cm². Variation of the average root mean square value of the surface roughness as a function of fluence was examined.     

采用PIN二极管反馈的射频可变增益放大器

射频可变增益放大器大多基于CMOS工艺和砷化镓工艺,通过改变晶体管的偏置电压或建立衰减器增益控制结构实现增益可调.本文采用高性能的射频锗硅异质结双极晶体管,设计并制作了一款射频可变增益放大器.放大器的增益可控性通过改变负反馈支路中PIN二极管的正向偏压来实现.基于带有PIN二极管反馈的可变增益放大器的高频小信号等效电路,本文详细分析了增益可控机制,设计并制作完成了1.8GHz的可变增益放大器.测试结果表明在频率为1.8GHz时,控制电压从0.6V到3.0V的变化范围内,增益可调范围达到15dB;噪声系数低于5.5dB,最小噪声系数达到2.6dB.整个控制电压变化范围内输入输出匹配均保持良好,线性度也在可接受范围内.     

220GHz低噪声放大器研究

基于IHP锗硅BiCMOS工艺,研究和实现了两种220 GHz低噪声放大器电路,并将其应用于220 GHz太赫兹无线高速通信收发机电路。一种是220 GHz四级单端共基极低噪声放大电路,每级电路采用了共基极（Common Base, CB）电路结构,利用传输线和金属-绝缘体-金属(Metal-Insulator-Metal, MIM)电容等无源电路元器件构成输入、输出和级间匹配网络。该低噪放电源的电压为1.8 V,功耗为25 mW,在220 GHz频点处实现了16 dB的增益,3 dB带宽达到了27 GHz。另一种是220 GHz四级共射共基差分低噪声放大电路,每级都采用共射共基的电路结构,放大器利用微带传输线和MIM电容构成每级的负载、Marchand-Balun、输入、输出和级间匹配网络等。该低噪放电源的电压为3 V,功耗为234 mW,在224 GHz频点实现了22 dB的增益,3 dB带宽超过6 GHz。这两个低噪声放大器可应用于220 GHz太赫兹无线高速通信收发机电路。     

SiGe HBT单粒子效应关键影响因素数值仿真

针对锗硅异质结双极晶体管(SiGe HBT),采用半导体三维器件数值仿真工具,建立单粒子效应三维损伤模型,研究SiGe HBT单粒子效应的损伤机理,以及空间极端环境与器件不同工作模式耦合作用下的单粒子效应关键影响因素。分析比较不同条件下离子入射器件后,各端口瞬态电流的变化情况,仿真实验结果表明,不同工作电压下,器件处于不同极端温度、不同离子辐射环境,其单粒子瞬态的损伤程度有所不同,这与器件内部在不同环境下的载流子电离情况有关。     

微波低噪声SiGe HBT的研制

利用3μm工艺条件制得SiGeHBT(HeterojunctionBipolarTransistor),器件的特征频率达到8GHz.600MHz工作频率下的最小噪声系数为1.04dB,相关功率增益为12.6dB,1GHz工作频率下的最小噪声系数为1.9dB,相关功率增益为9dB,器件在微波无线通信领域具有很大的应用前景     

三维CMOS集成电路技术研究

论述了三维集成电路(3DIC)的发展概况,介绍了近几年国外发展的各种三维集成电路技术,主要包括再结晶技术、埋层结构技术、选择性外延过生长技术和键合技术.并基于SiGe材料特性,提出了一种新型的Si-SiGe三维CMOS结构,即将第一层器件(Si nMOS)做在SOI(Si on insulator)材料上,接着利用SiO2/SiO2低温直接键合的方法形成第二层器件的有源层,然后做第二层器件(SiGe pMOS),最终形成完整的三维CMOS结构.与目前所报道的Si基三维集成电路相比,该电路特性明显提高.     

光化学气相淀积SiGe/Si材料的机制分析

本文对光化学气相淀积SiGe/Si过程中气相反应机制和表面反应历程进行了分析和讨论.利用表面反应动力学的有关理论,结合光化学气相淀积的特点,推导出光化学气相淀积SiGe/Si过程中的生长速率和生长压力的关系.并给出该理论结果和实际实验结果的比较.     

An 8-bit, 200 MSPS Folding and Interpolating ADC

An 8-bit, 200 MSPS folding and interpolating analog-to-digitalconverter, ADC, has been implemented in a 1.2 µmBiCMOS-process. It achieves 7.5 effective bits with a power dissipationof 575mW. The active area is 4mm². The implementationand measured results are presented. A simple analytical modelfor the interpolation-induced nonlinearity in a folding and interpolatingADC using sinusoidal folding is presented. The bowing of thereference ladder due to interaction with the input stages isanalyzed, and analytical models are derived.     

Effect of annealing temperature for Si0.8Ge0.2 epitaxial thin films

This study investigates the effect of annealing temperature on the Si_0.8Ge_0.2 epitaxial layers. The Si_0.8Ge_0.2 epitaxial layers were deposited by using ultrahigh vacuum chemical vapor deposition (UHVCVD) with different annealing temperatures (400-1000 °C). Various measurement technologies, including high-resolution X-ray diffraction (HRXRD), atomic force microscopy (AFM) and interfacial adhesion tester, were used to characterize the materials properties of the SiGe epilayers. The experimental results showed that the SiGe epilayers gradually reduced lattice-mismatch to the underlying substrate as annealing temperature increased (from 400 to 800 °C), which resulted from a high temperature enhancing interdiffusion between the epilayers and the underlying substrate. In addition, the average grain size of the SiGe films increased from 53.3 to 58 nm with increasing annealing temperature. The surface roughness in thin film annealed at 800 °C was 0.46 nm. Moreover, the interfacial adhesion strength increased from 476 ± 9 to 578 ± 12 kg/cm² with increasing the annealing temperature.     

SiGe异质结双极晶体管的基区优化

对应用于高频微波功率放大器的SiGe异质结双极晶体管(HBT)的基区进行了优化.研究发现,器件对基区Ge组分以及掺杂浓度十分敏感.采用重掺杂基区,适当提高Ge组分并形成合适的浓度分布,可以有效地改进SiGe HBT的直流特性,同时能够提高器件的特征频率.晶体管主要性能的提高使SiGe HBT技术在微波射频等高频电子领域得到更加广泛的应用.