BiCMOS工艺的高线性度下变频混频器设计

利用BiCMOS工艺设计了一种高线性度下变频混频器.在此变频混频器的设计中结合了双极型工艺在射频段的高性能以及MOS工艺的高线性度,并利用其对传统的吉尔伯特单元进行了优化.基于JAZZ 0.35μm标准BiCMOS SBC35工艺设计参数对混频器进行了设计和仿真,仿真结果表明该混频器获得了良好的性能指标,转换增益为9.3 dB,输入3阶互调点达到了16 dBm,在5 V单电源下消耗1.9 mA的电流.     

Effect of Ge profile design on the performance of an n-p-n SiGe HBT-based analog circuit

Two new germanium profiles, graded double box (GDB) and graded step box (GSB), are considered in the base region for an n-p-n silicon-germanium heterojunctions bipolar transistors (SiGe HBTs). Their effects on the performance of the HBT-based common emitter amplifier circuit are investigated so as to predict the behavior of analog circuits in the high-frequency region. An analytical model of an n-p-n SiGe HBT with uniform impurity doping in the base is described, and used to extract SPICE parameters for the devices based on GDB and GSB as well as other two accepted profiles i.e. box and triangular profiles. The frequency response, current gain roll-off and gain-bandwidth product of HBT-based common emitter amplifier circuit for all the four profiles have been compared and contrasted.     

Design and fabrication of multiple-valued multiplexer using negative differential resistance circuits and standard SiGe process

The design of a four-valued multiplexer using the negative differential resistance (NDR) circuit is demonstrated. The NDR circuit used in this work is made of the Si-based metal–oxide–semiconductor field-effect-transistor (MOS) and the SiGe-based heterojunction bipolar transistor (HBT). However we can obtain the NDR characteristic in its combined I–V curve by suitably arranging the MOS parameters. This novel multiplexer is made of MOS–HBT–NDR-based decoders and inverters. The fabrication is based on the standard 0.35 μm SiGe BiCMOS process.     

亚微米BiCMOS电路纵向NPN管的ESD保护研究

文章以0.6μmN外延BiCMOS工艺为基础,研究了纵向NPN管的ESD保护行为,并对不同版图结构的纵向NPN管进行了ESD行为研究。实验表明,由于基区的内在电阻不一样,在该工艺条件下,CEB、CEBE结构比CBE、CBEB结构SNAPBACK效应明显,机器模式下ESD保护能力强。此外,还研究了兼容低压Vz工艺,单级保护NMOS输出管的纵向NPN器件的ESD行为,流片显示采用EB结齐纳击穿的纵向NPN能有效单级保护CMOS的输出级。     

Effect of annealing temperature for Si0.8Ge0.2 epitaxial thin films

This study investigates the effect of annealing temperature on the Si_0.8Ge_0.2 epitaxial layers. The Si_0.8Ge_0.2 epitaxial layers were deposited by using ultrahigh vacuum chemical vapor deposition (UHVCVD) with different annealing temperatures (400-1000 °C). Various measurement technologies, including high-resolution X-ray diffraction (HRXRD), atomic force microscopy (AFM) and interfacial adhesion tester, were used to characterize the materials properties of the SiGe epilayers. The experimental results showed that the SiGe epilayers gradually reduced lattice-mismatch to the underlying substrate as annealing temperature increased (from 400 to 800 °C), which resulted from a high temperature enhancing interdiffusion between the epilayers and the underlying substrate. In addition, the average grain size of the SiGe films increased from 53.3 to 58 nm with increasing annealing temperature. The surface roughness in thin film annealed at 800 °C was 0.46 nm. Moreover, the interfacial adhesion strength increased from 476 ± 9 to 578 ± 12 kg/cm² with increasing the annealing temperature.     

基于0.18μm SiGe BiCMOS工艺的25Gb/s宽带可变增益放大器

介绍了一种基于0.18 μm SiGe BiCMOS工艺的,可应用于高速通信的25 Gb/s可变增益放大器(VGA).该放大器由核心电路、输出缓冲器和偏置电路组成,核心电路采用改进型Gilbert结构,增大了电路的增益动态范围;同时采用电感峰化技术克服大寄生电容来实现宽带特性.后仿真结果表明,该可变增益放大器的最大增益为20.15 dB,-3 dB带宽(BW)为26.8 GHz,可支持高达25 Gb/s的数据速率,在3.3 V电源电压下的功耗为26.4 mW,芯片大小为1 120 μm×1 167 μm.     

Performance analysis of SiGe double-gate N-MOSFET

The major purpose of this paper is to find an alternative configuration that not only minimizes the limitations of single-gate (SG) MOSFETs but also provides the better replacement for future technology. In this paper, the electrical characteristics of SiGe double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si double-gate N-MOSFET. Furthermore, in this paper the electrical characteristics of Si double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si single-gate N-MOSFET. The simulations are carried out for the device at different operational voltages using Cogenda Visual TCAD tool. Moreover, we have designed its structure and studied both I_d-V_g characteristics for different voltages namely 0.05, 0.1, 0.5, 0.8, 1 and 1.5 V and I_d-V_d characteristics for different voltages namely 0.1, 0.5, 1 and 1.5 V at work functions 4.5, 4.6 and 4.8 eV for this structure. The performance parameters investigated in this paper are threshold voltage, DIBL, subthreshold slope, GIDL, volume inversion and MMCR.     

采用PIN二极管反馈的射频可变增益放大器

射频可变增益放大器大多基于CMOS工艺和砷化镓工艺,通过改变晶体管的偏置电压或建立衰减器增益控制结构实现增益可调.本文采用高性能的射频锗硅异质结双极晶体管,设计并制作了一款射频可变增益放大器.放大器的增益可控性通过改变负反馈支路中PIN二极管的正向偏压来实现.基于带有PIN二极管反馈的可变增益放大器的高频小信号等效电路,本文详细分析了增益可控机制,设计并制作完成了1.8GHz的可变增益放大器.测试结果表明在频率为1.8GHz时,控制电压从0.6V到3.0V的变化范围内,增益可调范围达到15dB;噪声系数低于5.5dB,最小噪声系数达到2.6dB.整个控制电压变化范围内输入输出匹配均保持良好,线性度也在可接受范围内.     

Nanocrystal growth of single-phase Si1−xGex alloys

We present the formation of single-phase Si_1−xGe_x (x=0.2, 0.4, 0.6, and 0.8) alloy nanocrystals dispersed in a SiO₂ matrix. The studied samples were prepared by co-sputtering with excess Si_1−xGe_x in SiO₂ of approximately 33 at%. Upon heat treatment, crystallization of Si_1−xGe_x alloys was examined by using X-ray diffraction and high-resolution transmission electron microscopy measurements. Single structure of face-centered cubic nanocrystals in a space group Fd-3m was concluded. The average nanocrystal size (from 2 nm to 10 nm) and the lattice constant a of the single-phase Si_1−xGe_x nanocrystals were found to increase with the Ge composition parameter x. Density functional theory-generalized gradient approximation calculation showed the replacement of Ge into the Si sites and vice versa.     

基于SiGe BiCMOS 工艺的X 和Ka 波段T / R 多功能芯片设计

提出了应用0. 13 μm SiGe BiCMOS 工艺设计的全集成X 和Ka 波段T/ R 多功能芯片。包括5 位数控 移相器、低噪声放大器、功率放大器和收发控制开关都被集成在单片上。首次将分布式结构应用在多功能芯片的小 信号放大器设计中,而且将堆叠式结构的功放集成在收发芯片中,此两款多功能芯片均有着带宽宽、增益高、输出功 率大等优点。其中X 波段收发芯片接收、发射增益分别达到25 dB、22 dB,发射输出P(-1dB) 达到28 dBm;Ka 波段收发 芯片接收、发射增益分别达到17 dB、14 dB,发射输出P(-1 dB)达到20. 5 dBm。此两款应用硅基工艺设计的多功能芯片 指标均达到国际先进水平,为X 和Ka 波段相控阵系统的小型化和低成本化提供了良好的条件。