基于无线传感网的多功能低功耗数据采集平台设计

针对有线数据传输方式成本高、布线不易等缺陷,采用以MC1322X为核心,设计实现了一套基于ZigBee技术的数据无线传输系统。系统由采集节点、路由节点、协调器节点和上位机监控软件组成。介绍了系统原理结构,详细阐述了系统的硬件设计、系统的软件流程图。测试结果表明,采集节点具备低功耗特性,系统能够进行实时可靠通信。     

芯片背面磨削减薄技术研究

通过实验数据和实物照片列出了减薄工艺参数、检测结果;并结合实例研究了现代磨削减薄系统多采用的硅片自旋转磨削技术,探讨脆性材料进行延性域磨削的加工机理。     

固态硬盘（SSD）产品现状与展望

文章首先对固态硬盘的现状进行了分析，其次阐述了固态硬盘的技术难度，包括运作效能的改善、NAND Flash的使用寿命改善、不正常断电的管理、更错、整体固态硬盘的可靠度及稳定度改善等，最后对固态硬盘的应用市场进行了展望。     

Post-manufacturing, 17-times acceptable raw bit error rate enhancement, dynamic codeword transition ECC scheme for highly reliable solid-state drives, SSDs

A dynamic codeword transition ECC scheme is proposed for highly reliable solid-state drives, SSDs. By monitoring the error number or the write/erase cycles, the ECC codeword dynamically increases from 512 Byte (+parity) to 1 KByte, 2 KByte, 4 KByte…32 KByte. The proposed ECC with a larger codeword decreases the failure rate after ECC. As a result, the acceptable raw bit error rate, BER, before ECC is enhanced. Assuming a NAND Flash memory which requires 8-bit correction in 512 Byte codeword ECC, a 17-times higher acceptable raw BER than the conventional fixed 512 Byte codeword ECC is realized for the mobile phone application without an interleaving. For the MP3 player, digital-still camera and high-speed memory card applications with a dual channel interleaving, 15-times higher acceptable raw BER is achieved. Finally, for the SSD application with 8 channel interleaving, 13-times higher acceptable raw BER is realized. Because the ratio of the user data to the parity bits is the same in each ECC codeword, no additional memory area is required. Note that the reliability of SSD is improved after the manufacturing without cost penalty. Compared with the conventional ECC with the fixed large 32 KByte codeword, the proposed scheme achieves a lower power consumption by introducing the “best-effort” type operation. In the proposed scheme, during the most of the lifetime of SSD, a weak ECC with a shorter codeword such as 512 Byte (+parity), 1 KByte and 2 KByte is used and 98% lower power consumption is realized. At the life-end of SSD, a strong ECC with a 32 KByte codeword is used and the highly reliable operation is achieved. The random read performance is also discussed. The random read performance is estimated by the latency. The latency is below 1.5 ms for ECC codeword up to 32 KByte. This latency is below the average latency of 15,000 rpm HDD, 2 ms.     

大尺寸Si片自旋转磨削表面的损伤分布研究

为了更好地评价大直径Si片磨削加工损伤深度的大小和分布,提高下道抛光工序的效率,采用角度抛光法和方差分析法研究了Si片表面的损伤分布.结果表明,采用自旋转磨削方式磨削的Si片表面的损伤分布不均匀,沿圆周方向在(110)晶向处的损伤深度比在(100)晶向处的损伤深度大,沿半径方向从圆心到边缘损伤深度逐渐增大,损伤深度的最大差值约为2.0um.该分布规律对检测损伤深度时样品采集位置的选取及提高抛光加工效率均有重要的指导意义.     

A classical dataset from Williams,and its role in the study of supersaturated designs

A Plackett‐Burman type dataset from a paper by Williams [1], with 28 observations and 24 two‐level factors, has become a standard dataset for illustrating construction (by halving) of supersaturated designs (SSDs) and for a corresponding data analysis. The aim here is to point out that for several reasons this is an unfortunate situation. The original paper by Williams contains several errors and misprints. Some are in the design matrix, which will here be reconstructed, but worse is an outlier in the response values, which can be observed when data are plotted against the dominating factor. In addition, the data should better be analysed on log‐scale than on original scale. The implications of the outlier for SSD analysis are drastic, and it will be concluded that the data should be used for this purpose only if the outlier is properly treated (omitted or modified). Copyright © 2008 John Wiley & Sons, Ltd.     

基于压电元件的同步开关减振技术的实验研究

基于压电元件的被动控制技术正得到越来越多的重视。该文针对一种新型的被动减振技术———基于压电元件的同步开关减振技术,进行了理论分析和实验研究。详细阐明了同步开关减振技术的原理,并以根部粘贴有压电陶瓷片的悬臂梁系统为例,对同步开关振动控制进行了实验研究,给出了被动减振的实验结果。     

全过程控制的ESD防护管理

介绍了ESD（静电放电）现象,阐述了静电敏感器件（SSD）在电子产品研制、生产全过程中必须采取的静电防护措施,以及通过实时监控系统来实现静电防护的闭环管理。     

OLED 驱动器的发展和应用

介绍了OLED/PLED的特点和目前其驱动器的发展状态。应用Solomon公司集行驱动、列驱动和控制器为一体的SSD1301芯片和低电压、低功耗的单片机W78LE58芯片,成功地驱动了96×64点阵的PLED显示屏,给出了硬件接口电路图和软件流程图。     

基于并行附加特征提取网络的SSD地面小目标检测模型

针对SSD原始附加特征提取网络（Original Additional Feature Extraction Network,OAFEN）中stride操作造成图像小目标信息丢失和串联结构产生的多尺度特征之间冗余度较大的问题,提出了一种计算量小、感受野大的深度可分离空洞卷积（Depthwise Separable Dilated Convolution,DSDC）,并利用DSDC设计了一个包含三个独立子网络的并行附加特征提取网络（Parallel Additional Feature Extraction Network,PAFEN）.PAFEN上路用两个DSDC提取尺寸为19*19和3*3的特征图;中路用一个DSDC提取尺寸为10*10的特征图;下路用两个DSDC提取尺寸为5*5和1*1的特征图.实验结果表明,在SSD框架内,PAFEN在mAP和检测时间等方面均优于OAFEN,适用于地面小目标的检测任务.