企业推行可靠性技术方法探讨

目前家电产品同质化竞争非常激烈,各企业在功能、性能、价格方面的差距逐渐减小,核心技术和产品质量成为企业立足的根本。其中,作为时间维度上的质薰特性-可靠性,已成为最影响消费者满意度的重要因素并受到市场广泛关注,有可能成为企业下一个战胜对手的秘密武器,如何提高产品可靠性是许多企业急切想得到的答案。文章结合企业开展可靠性工作的实践活动,从产品质量与可靠性、行业现状与企业网境引入可靠性工程的思考、可靠性工程体系建设、可靠性_T程产品导人等方面分析、阐述,力求探索一条推行可靠性技术的最佳途径,供企业同仁参考。     

电阻温度系数研究及其在可靠性早期监测中的应用

在大规模集成电路进入深亚微米时代的同时,金属互连层在产品的可靠性方面扮演着越来越重要的角色,因此,需要对金属层进行快速的在线监测。本文对电阻温度系数的内在物理含义进行了详细论述,讨论了电阻温度系数与金属电迁移可靠性失效时间的关系,指出电阻温度系数是一个可以表征金属可靠性的敏感参数,可以用来对金属可靠性进行早期评估与在线快速监测。同时讨论了金属层测试结构的几何尺寸对电阻温度系数的影响,指出了运用电阻温度系数进行早期可靠性在线监测时需要避免测试结构的干扰。     

大功率白光LED封装技术可靠性研究

首先介绍了大功率白光LED封装的前景和其主要功能,然后对大功率白光LED封装的关键技术,包括荧光胶封装工艺、外封胶选取、大尺寸晶片封装、可靠性测试与评估方面做了阐述。并对光斑改善和光通量提高做了一些具体的研究。     

Instruction-Level Fault Tolerance Configurability

Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance (FT) is becoming increasingly important in computing systems. Several schemes have been proposed to enable a user to configure the FT at the application level, thereby enabling the user to trade stronger FT for performance or vice versa. In this paper, we propose supporting instruction-level rather than application-level configurability of FT, since different parts of some applications (e.g., multimedia) can have different reliability requirements. Weak or no FT will be applied to less critical parts, resulting in time and/or resource gains. These gains can be used to apply stronger FT techniques to the more critical parts; hence increasing the overall reliability. The paper shows how some existing FT techniques can be adapted to support instruction-level FT configurability, how a programmer can specify the desired FT level of the instructions, and how the compiler can manage it automatically. A comparison between the existing FT scheme EDDI (which duplicates all instructions) and the proposed approach is performed both at the kernel and at full application levels. The simulation results show that both the performance and the energy consumption are significantly improved (up to 50% at the kernel and up to 16% at full application level), while the fault coverage depends on the application. For the full application (JPEG encoder), our approach is only applied to one kernel in order to avoid increasing the programming effort significantly.

Energy Efficient Reliable Data Collection in Wireless Sensor Networks with Asymmetric Links

Field measurements reveal that radio link asymmetry has a severe impact on reliable data delivery. We analyze the energy efficiencies of selected reliability schemes for asymmetric radio links using theoretical models. The analysis provides guidelines for retransmission control so as to balance between reliability and energy consumption. We also design two enhancements to the “implicit” ARQ scheme addressing the negative effects of asymmetric radio links. The energy efficiencies of these algorithms are explicitly derived using our theoretical model and validated by simulations and field trials. Based on the analysis of the two enhanced algorithms, we propose an improvement, referred to as Energy Efficient Reliable Data Collection (EERDC) that controls the retransmissions of the enhanced ARQ schemes. Simulations and field trials confirm our theoretical findings and demonstrate that our proposed EERDC algorithm alleviates the impact of link asymmetry and achieves energy savings.

工程设计中应用高压变频器要特别关注的问题

从工程设计的观点,对高压变频器的外部性能作了全面介绍,提出了许多应考虑的问题,高压变频器价格高,在生产中占有重要地位,有关技术问题涉及很多方面,因此,选择宜慎重,本文即为此而写。     

Mean time to failure and availability of semi-Markov missions with maximal repair

We analyze mean time to failure and availability of semi-Markov missions that consist of phases with random sequence and durations. It is assumed that the system is a complex one with nonidentical components whose failure properties depend on the mission process. The stochastic structure of the mission is described by a Markov renewal process. We characterize mean time to failure and system availability under the maximal repair policy where the whole system is replaced by a brand new after successfully completing a phase before the next phase starts. Special cases involving Markovian missions are also considered to obtain explicit formulas.     

A 0.8 μm CMOS testable switched-capacitor filter for video frequency applications

This paper presents the design of a fifth-order low-pass elliptic filter that employs a parallel connection of two all-pass sections to satisfy specifications commonly used in video frequency applications. Operating with a sampling frequency of 16 MHz, the IC prototype was implemented in a standard double-poly CMOS 0.8 μm process. The experimental verification showed a passband frequency deviation smaller than 0.08 dB up to the passband edge frequency of 3.4 MHz, and an output noise power of 0.97 ${\mu {\rm V}_{\rm RMS}}/{\sqrt {Hz}}This paper presents the design of a fifth-order low-pass elliptic filter that employs a parallel connection of two all-pass sections to satisfy specifications commonly used in video frequency applications. Operating with a sampling frequency of 16 MHz, the IC prototype was implemented in a standard double-poly CMOS 0.8 μm process. The experimental verification showed a passband frequency deviation smaller than 0.08 dB up to the passband edge frequency of 3.4 MHz, and an output noise power of 0.97 , resulting in a dynamic range of 49.1 dB. The filter structure enables multiple fault detection and suits modern automated testing configurations to allow accurate estimation of the actually implemented transfer function parameters, an issue of increasing importance in VLSI circuit design. The relative area required for testing the fifth-order filter is only 8% of the total filter area, and decreases as the filter order increases. Jorge Morales Ca?ive was born in Cienfuegos, Cuba, in 1963. He received the B.Sc. and M.Sc. degrees from the Technical University of San Petersburg, Russia, in 1986 and 1988, respectively, and the D.Sc. degree from the Federal University of Rio de Janeiro, Brazil, in 1991, all in electrical engineering. From 1988 to 1994, he worked at CEADEN, in Havana, Cuba, on the development of nuclear equipments. From 1994 to 1997, he worked at INOR, in Havana, Cuba, on the research and development of acquisition systems and image processing for nuclear medicine. His research interests are in the areas of analog and digital signal processing. Antonio Petraglia (S’89-M’91-SM’99) received the Engineer and M.Sc. degrees from the Federal University of Rio de Janeiro (UFRJ), Brazil, in 1977 and 1982, respectively, and the Ph.D. degree from the University of California, Santa Barbara (UCSB), in 1991, all in electrical engineering. In 1979, he joined the Faculty of UFRJ as an Associate Professor of electrical engineering, where he served as a Co-Chair in the Department of Electronic Engineering from 1982 to 1984. During the second semester of 1991, he was a post-Doctoral researcher with the Department of Electrical and Computer Engineering at UCSB. Since 1992 he has been on the faculty of the Program for Post-Graduate Engineering at UFRJ, where in 1997 he established the Laboratory for the Processing of Analog and Digital Signals. From March 2001 through March 2002 he was a Visiting Scholar with the Electrical Engineering Department at the University of California, Los Angeles. He has been involved in teaching and research activities in the areas of analog and digital signal processing, and in mixed analog-digital integrated circuit design. He is a distinguished member of the Brazilian Millenium Group in Nanoelectronics and Microelectronics in 2006-2008. Dr. Petraglia served as an Associate Editor for the IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing in 2002–2003 Mariane Rembold Petraglia (M’97) received the B.Sc. degree in electronic engineering from the Federal University of Rio de Janeiro, Brazil, in 1985, and the M.Sc. and Ph.D. degrees in electrical engineering from the University of California, Santa Barbara, in 1988 and 1991, respectively. From 1992 to 1993, she was with the Department of Electrical Engineering, Catholic University of Rio de Janeiro, Brazil. Since 1993, she has been with the Department of Electronic Engineering and with the Program of Electrical Engineering, COPPE, at the Federal University of Rio de Janeiro, where she is presently an Associate Professor. From March 2001 to February 2002, she was a Visiting Researcher with the Adaptive Systems Laboratory, at the University of California, Los Angeles. Her research interests are in adaptive signal processing, multirate systems, and image processing. Dr. Petraglia is a member of Tau Beta Pi, and a distinguished member of the Brazilian Millenium Group in Nanoelectronics and Microelectronics in 2006–2008. She is serving as an Associate Editor for the IEEE Transactions on Signal Processing since Nov. 2004.     

一种新的DC-DC混合电源寿命预计方法

随着国产DC-DC混合电源产品的快速发展,其寿命越来越长,如何快速、准确地评价产品的寿命成为一项十分重要且紧迫的问题。瓷介电容和厚膜电阻是DC-DC混合电源中最容易发生失效的部位,是影响DC-DC混合电源寿命的关键元器件。通过对瓷介电容和厚膜电阻进行加速寿命试验,得到实际的失效率,进而通过可靠性预计的方法,获得DC-DC混合电源准确的寿命信息。     

Pre- and post-breakdown electrical studies in ultrathin Al2O3 films by conductive atomic force microscopy

The loss of local dielectric integrity in ultrathin Al₂O₃ films grown by atomic layer deposition is investigated using conducting atomic force microscopy. I–V spectra acquired at different regions of the samples by constant and ramping voltage stress are analyzed for their pre- and post-breakdown signatures. Based on these observations, the thickness dependent dielectric reliability and failure mechanism are discussed. Our results show that remarkable enhancement in breakdown electric field as high as 130 MV/cm is observed for ultrathin films of thickness less than 1 nm.