一种PN码自适应捕获门限的改进算法

文献[1]提出了一种用于直扩系统的PN码自适应门限算法。但该文献也指出,此算法对门限总数十分敏感。当门限总数设置不当时,系统的平均捕获时间将显著增加。这限制了该算法在实际中的应用。本文就此提出了改进,给出了算法及电路框图。仿真结果表明,与原方案相比,改进算法改善了对门限总数的敏感性,降低了PN码平均捕获时间。     

Java语言及其虚拟机技术探讨

随着Internet的迅猛发展，Internet编程语言Java愈来愈成为计算机行业的焦点。本文在简述了Java的主要特点后，重点对Java最关键的技术──虚拟机进行了深入的探讨。     

Modular implementation of efficient self-checking checkers for the Berger code

A technique for designing efficient checkers for conventional Berger code is proposed in this paper. The check bits are derived by partitioning the information bits into two blocks, and then using an addition array to sum the number of 1's in each block. The check bit generator circuit uses a specially designed 4-input 1's counter. Two other types of 1's counters having 2 and 3 inputs are also used to realize checkers for variable length information bits. Several variations of 2-bit adder circuits are used to add the number of 1's. The check bit generator circuit uses gates with fan-in of less than or equal to 4 to simplify implementation in CMOS. The technique achieves significant improvement in gate count as well as speed over existing approaches.     

Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test

A system-on-chip (SOC) usually consists of many memory cores with different sizes and functionality, and they typically represent a significant portion of the SOC and therefore dominate its yield. Diagnostics for yield enhancement of the memory cores thus is a very important issue. In this paper we present two data compression techniques that can be used to speed up the transmission of diagnostic data from the embedded RAM built-in self-test (BIST) circuit that has diagnostic support to the external tester. The proposed syndrome-accumulation approach compresses the faulty-cell address and March syndrome to about 28% of the original size on average under the March-17N diagnostic test algorithm. The key component of the compressor is a novel syndrome-accumulation circuit, which can be realized by a content-addressable memory. Experimental results show that the area overhead is about 0.9% for a 1Mb SRAM with 164 faults. A tree-based compression technique for word-oriented memories is also presented. By using a simplified Huffman coding scheme and partitioning each 256-bit Hamming syndrome into fixed-size symbols, the average compression ratio (size of original data to that of compressed data) is about 10, assuming 16-bit symbols. Also, the additional hardware to implement the tree-based compressor is very small. The proposed compression techniques effectively reduce the memory diagnosis time as well as the tester storage requirement.     

在线误码监测方法及其性能

本文论述了在数字通信中进行在线误码监测的必要性，介绍了几种在线误码监测方法，并对其监测性能进行了理论分析。     

Research on encoding and decoding of non-binary polar codes over GF(2m)

Binary Polar Codes (BPCs) have advantages of high-efficiency and capacity-achieving but suffer from large latency due to the Successive-Cancellation List (SCL) decoding. Non-Binary Polar Codes (NBPCs) have been investigated to obtain the performance gains and reduce latency under the implementation of parallel architectures for multi-bit decoding. However, most of the existing works only focus on the Reed-Solomon matrix-based NBPCs and the probability domain-based non-binary polar decoding, which lack flexible structure and have a large computation amount in the decoding process, while little attention has been paid to general non-binary kernel-based NBPCs and Log-Likelihood Ratio (LLR) based decoding methods. In this paper, we consider a scheme of NBPCs with a general structure over GF(2^m). Specifically, we pursue a detailed Monte-Carlo simulation implementation to determine the construction for proposed NBPCs. For non-binary polar decoding, an SCL decoding based on LLRs is proposed for NBPCs, which can be implemented with non-binary kernels of arbitrary size. Moreover, we propose a Perfect Polarization-Based SCL (PPB-SCL) algorithm based on LLRs to reduce decoding complexity by deriving a new update function of path metric for NBPCs and eliminating the path splitting process at perfect polarized (i.e., highly reliable) positions. Simulation results show that the bit error rate of the proposed NBPCs significantly outperforms that of BPCs. In addition, the proposed PPB-SCL decoding obtains about a 40% complexity reduction of SCL decoding for NBPCs.     

GPS接收机中的码分多址信号处理研究

介绍了基于码分多址信号处理的GPS(全球定位系统)接收机的算法和电路设计。GPS接收机电路的信号处理任务主要是对数字化后的基带扩频信号进行载波跟踪、解调、解扩、码跟踪,从而得到符号数据。着重讨论了GPS接收机中信号处理部分的COSTAS、码跟踪、帧同步生成电路三大模块的功能任务、原理、算法及其相应的电路设计。通过这些研究工作,可以进一步设计出当前应用日益普遍的GPS接收机电路,该电路具有功能全面、通用性好、可靠性高等特点。     

基于WebGL的3D立库可视化系统设计与实现

针对当前扩大化和普及化的仓储物流,提出了一种3D自动化立体仓库可视化系统的实现方案,用以解决仓储系统中遇到的数据不直观的问题.该系统采用JavaScript编程语言,以Three.js引擎为基础,构建了基于WebGL的三维自动化立体仓库的可视化系统,该系统能有效直观的进行仓储管理,适合现代化仓储企业的管理需求.     

用遗传算法构造光正交码

提出了一种利用遗传算法构造任意码长、码重、自相关限、互相关限光正交码(GA-OOC)的方法,设计了新的码字矩阵;分析了基于GA-OOC的光CDMA系统的误码率性能。仿真结果表明:该算法具有构造算法简单、易于编程实现的特点;与基于PC,EPC,QC和BIBD-OOC的光码分多址系统相比,GA-OOC的光码分多址系统具有更好的误码率性能。GA-OOC有望用于构造二维光地址码。