综合核心处理机的设计与实现

针对机载传感器系统的数字计算应用,分析了综合核心处理机（ICP）的架构特征及其设计时的考量因素,完成了软硬件架构及总线互连设计。在保证ICP硬件通用化、架构开放性及功能可重构的前提下,通过合理地设计模块内部电路、软件层次、网络拓扑及传输机制,有效降低了通信代价,从而提高系统的运算性能。这些方法和技术已被证明是可行的,并在实际的工程中成功应用。     

新型弹箭载配电器的研制

针对弹箭载外测安全系统中地面供配电模式存在系统构建繁杂、电缆网庞大、维护以及故障排查难度大等缺点,在分析比较传统地面供配电和弹载供配电方案的基础上,提出了一种将地面配电系统平移到弹上,即研发一种新型弹箭载配电器的解决方案。由于利用了工业总线和磁保持继电器技术,系统试验结果表明,新型弹载配电器完全满足弹箭载外测安全系统测试要求。     

GaAs PIN二极管大功率毫米波单刀双掷开关单片

采用76.2mm(3英寸)GaAs PIN二极管工艺设计和制作了大功率毫米波单刀双掷开关单片。采用并联结构的单刀双掷开关以获得较高的功率特性。在片测试表明,在30～36GHz工作频段,开关导通支路插损1.0dB,驻波优于1.5,开关关断端口隔离度大于34dB。开关在导通态下输入功率0.5dB压缩点P-0.5 dB大于5W。     

（英）沉积参数对射频磁控溅射制备的碲锌镉薄膜的影响

采用Cd096Zn0.04Te靶,利用射频磁控溅射制备碲锌镉薄膜,通过改变基片温度、溅射功率和工作气压,制得不同的碲锌镉薄膜.将制备的碲锌镉薄膜放置在高纯空气气氛中,在473 K温度下退火.利用台阶仪、分光光度计、XRD和SEM测试设备表征,结果表明,通过退火和改变沉积参数,可以制备出禁带宽度在1.45～2.02eV之间调节的碲锌镉薄膜.     

FCG延时控制系统的改进

延时控制系统是爆磁压缩发生器的关键技术之一。增强延时控制系统绝缘性和提高延时控制精度能有效提升爆磁压缩发生器输出性能。本文介绍了两种通用延时控制系统的工作原理,分析了其优缺点。在理论和试验的基础上,结合两种延时控制系统优点,设计了一种同轴式同步开关,提出了符合爆磁压缩发生器应用要求的延时控制系统。试验表明,改进延时控制系统能满足爆磁压缩发生器的工作要求。     

X波段2×3平面开关矩阵设计

提出一种设计平面开关矩阵的方法。通过使用单刀单掷(SPST)芯片开关、芯片功分器和0 dB定向耦合器等简单电路实现开关矩阵的平面拓扑。由于射频电路使用键合工艺将芯片、微带无源电路进行连接,因此与传统开关矩阵相比,具有体积小、重量轻、工艺简单、可靠性高的特点。最后通过对一个X波段2×3平面开关矩阵设计和测试,证明了该设计的有效性。     

基于STM32和GSM的远程遥控定时开关装置

针对市场上现有的定时开关装置的弊端,设计了一种基于STM32处理器的定时开关装置。该装置利用GSM网络实现远程遥控功能,并通过nRF24L01+无线通信模块,遥控在一定范围内任意分布的多个开关。系统具有友好的人机交流界面,可设置多组定时时间,以及触摸屏控制、掉电保护和红外遥控等功能。     

一种X波段船用导航雷达射频子系统

介绍了一种民用船用导航雷达射频子系统架构。采用X波段线性调频连续波体制,结构上采用当前流行的两单元设计。收发天线分离,使用微带阵列双天线,和射频前端集成安装在一个基板两侧。最终装入天线罩后,整体尺寸为φ60＊25cm,包括天线罩的总质量不超过5kg,总功耗小于20W。雷达的主要功能是对多批目标进行连续探测和跟踪,显示目标的点迹、航迹、速度、航向等参数。     

TD-SCDMA： Spectrum Modeling, Experimental Verification of Power Amplifier Nonlinearity

RF Power amplifiers （PA） are critical components in Time division-Synchronous code division multiple access （TD-SCDMA） systems, and PA nonlinearity is one of the main concerns in RF power amplifier designs. This paper presents experimental verification of the spectrum modeling of a RF power amplifier in TD-SCDMA system based on our previous work. The results verify the theoretical spectrum model we derived closely fits the experimental measurements.     

A high‐performance switch architecture based on mesh of trees

With emergence of various new Internet‐enabled devices, such as tablet PCs or smart phones along with their own applications, the traffic growth rate is getting faster and faster these days and demands more communication bandwidth at even faster rate than before. To accommodate this ever‐increasing network traffic, even faster Internet routers are required. To respond for these needs, we propose a new mesh of trees based switch architecture, called MOTS(N) switch. In addition, we also propose two more variations of MOTS(N) to further improve it. MOTS(N) is inspired by crossbar with crosspoint buffers. It forms a binary tree for each output line, where each gridpoint buffer ? ? Because the fabric of MOTS(N) switch is not pure crossbar, we call the buffers in the same location in pure crossbar gridpoint buffers. Details will be presented in the following sections.
is a leaf node and each internal node is 2‐in 1‐out merge buffer § § 2‐in 1‐out merge buffer can accommodate two memory writes and one memory read simultaneously by using its modularized architecture 31 .
emulating FIFO queues. Because of this FIFO characteristic of internal buffers, MOTS(N) ensures QoS like FIFO output‐queued switch. The root node of the tree for each output line is the only component connected to the output port where each cell is transmitted to output port without any contention. To limit the number of buffers in MOTS(N) switch, we present one of its improved (practical) variations, IMOTS(N) switch, as well. For IMOTS(N) switch architecture, sizes of the buffers in the fabric are limited by a certain amount. As a downside of IMOTS(N), however, every cell should go through log ₂N + 1 number of buffers in the fabric to be transmitted to the designated output line. Therefore, for even further improvement, IMOTS(N) with cut‐through, denoted as IMOTS‐CT(N), is also proposed in this paper. In IMOTS‐CT(N) switch, the cells can cut through one or more empty buffers to be transferred from inputs to outputs with simple 1 or 2 bit signal exchanges between buffers. We analyze the throughput of MOTS(N), IMOTS(N), and IMOTS‐CT(N) switches and show that they can achieve 100% throughput under Bernoulli independent and identically distributed uniform traffic. Our quantitative simulation results validate the theoretical analysis. Copyright © 2012 John Wiley & Sons, Ltd.