Biomolecules-Incorporated Metal-Organic Frameworks Gated Light-Sensitive Organic Photoelectrochemical Transistor for Biodetection

Incorporating biomolecules into metal-organic frameworks (MOFs) as exoskeletons to form biomolecules-MOFs biohybrids has attracted great attention as an emerging class of advanced materials. Organic devices have been shown as powerful platforms for next-generation bioelectronics, such as wearable biosensors, tissue engineering constructs, and neural interfaces. Herein, biomolecules-incorporated MOFs as innovative gating module is realized for the first time, which is exemplified by biocatalytic precipitation (BCP)-oriented horseradish peroxidase (HRP)-embedded zeolitic imidazolate framework-90 (HRP@ZIF-90)/CdIn₂S₄ gated organic photoelectrochemical transistor under light illumination. In connection to a sandwich immunocomplexing targeting the model analyte human IgG, the IgG-dependent generation of H₂O₂ and the tandem HRP-triggered BCP reaction can cause the in situ blocking of the pore network of ZIF-90, leading to variant gating effect with corresponding responses of the device. This representative biodetection achieved good analytical performance with a wide linear range and a low detection limit of 100 fg mL⁻¹. In the view of the plentiful biomolecule-MOF complexes and their potential interactions with organic systems, this study provides a proof-of-concept study for the generic development of biomolecules-MOFs-gated electronics and beyond.     

5G毫米波通信用低插损高隔离GaAs PHEMT单刀双掷开关

基于0.15μm GaAs赝配高电子迁移率晶体管(PHEMT)工艺,实现了一款用于5G毫米波通信的低插损高隔离单刀双掷(SPDT)开关芯片。为了降低插损,每个开关支路通过四分之一波长阻抗变换器连接到天线端,并通过优化传输线和器件总栅宽实现了良好的端口匹配;为了提高隔离度,采用了三并联多节枝的分布式架构形成高的输入阻抗状态,实现信号的全反射。芯片面积为2.1 mm×1.1 mm。在片测试结果显示,在24.25~29.5 GHz的5G毫米波频段内该SPDT开关实现了小于1.1 dB的极低插损和大于32 dB的高隔离度,1 dB压缩点输入功率大于26 dBm。     

IGBT芯片静态输出曲线连续测量方法

绝缘栅双极型晶体管(IGBT)芯片的静态输出曲线是考核其能量损耗及指导多芯片并联设计的重要指标之一。现有测量IGBT静态输出曲线的方法多采用商用化的功率器件分析仪,然而商业化功率器件分析仪存在价格昂贵、夹具单一的问题。亟需开发一种简单、快速、有效的静态输出曲线测量方法。面向高压IGBT芯片,提出一种新的静态输出曲线连续测量方法及测试电路,有效减小了IGBT芯片的电导调制效应和温升效应对静态输出曲线的影响。通过实时测量动态过程中的电压及电流,可以快速得到IGBT芯片静态输出曲线。通过对比本文连续法与功率器件分析仪的测量结果,证明了所提方法的有效性。     

基于FPGA的短波红外图像灰度级拉伸算法实现

为了增强短波红外成像仪的成像对比度,提高目标的识别率,介绍了一种基于现场可编程门阵列(FPGA)的灰度拉伸算法的实现方法。利用视频数据两帧之间灰度分布近似的特性,通过统计上一帧图像的灰度分布,计算图像拉伸所需要的参数,处理当前帧的图像,达到实时处理的效果。在灰度统计模块中,利用FPGA的片上块随机存储器(Block RAM)资源,采用非倍频的流水线数字逻辑设计,避免了跨时钟域的操作,降低了系统状态机的复杂度,提高了系统的工作频率。采用国产320×256元InGaAs面阵探测器,搭载了Xilinx Artix-7系列芯片的实验平台进行实验,仿真结果表明,该方法能有效提高短波红外图像的对比度,具有占用资源少、运算速度快、成本低、可移植性高等优点,满足短波红外成像仪实时灰度拉伸处理的设计要求。     

Printed plastic electronics and paperlike displays

Plastic electronic materials and high‐resolution printing methods may be important technologies for new classes of consumer electronic devices that are lightweight, mechanically flexible and bendable, and that can cover large areas at low cost. This article summarizes some of our recent work in this area. It focuses on the materials and patterning techniques that we used to produce plastic active‐matrix backplane circuits for a type of paperlike display. © 2002 Wiley Periodicals, Inc. J Polym Sci Part A: Polym Chem 40: 3327–3334, 2002     

Low-temperature conductance measurements of surface states in HfO2–Si structures with different gate materials

Metal-oxide-semiconductor capacitors based on HfO₂ gate stack with different metal and metal compound gates (Al, TiN, NiSi and NiAlN) are compared to study the effect of the gate electrode material on the trap density at the insulator–semiconductor interface.C–V and G–ω measurements were made in the frequency range from 1 kHz to 1 MHz in the temperature range 180–300 K. From the maximum of the plot G/ω vs. ln(ω) the density of interface states was calculated, and from its position on the frequency axis the trap cross-section was found. Reducing temperature makes it possible to decrease leakage current through the dielectric and to investigate the states located closer to the band edge.The structures under study were shown to contain significant interface trap densities located near the valence band edge (around 2×10¹¹ cm⁻²eV⁻¹ for Al and up to (3.5–5.5)×10¹² cm⁻² eV⁻¹ for other gate materials). The peak in the surface state distribution is situated at 0.18 eV above the valence band edge for Al electrode. The capture cross-section is 5.8×10⁻¹⁷ cm² at 200 K for Al–HfO₂–Si structure.     

Modeling growth rate of HfO2 thin films grown by metal-organic molecular beam epitaxy

HfO₂ dielectric layers were grown on the p-type Si (100) substrate by metal-organic molecular beam epitaxy (MOMBE). Hafnium-tetra-butoxide, Hf(O·t-C₄H₉)₄ was used as a Hf precursor and Argon gas was used as a carrier gas. The thickness of the HfO₂ film and intermediate SiO₂ layer were measured by scanning electron microscopy (SEM) and high-resolution transmission electron microscopy (HRTEM). The properties of the HfO₂ layers were evaluated by X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), high frequency (HF) capacitance-voltage (C-V) measurement, and current-voltage (I-V) measurement. C-V and I-V measurements have shown that HfO₂ layer grown by MOMBE has a high dielectric constant (k) of 20-22 and a low-level of leakage current density. The growth rate is affected by various process variables such as substrate temperature, bubbler temperature, Ar and O₂ gas flows and growth time. Since the ratio of O₂ and Ar gas flows are closely correlated, the effect of variations in O₂/Ar flow ratio on growth rate is also investigated using statistical modeling methodology.     

Quantum-mechanical effects and gate leakage current of nanoscale n-type FinFETs: A 2d simulation study

This paper simulates a kind of new sub-50 nm n-type double gate MOS nanotransistors by solving coupled Poisson-Schrödinger equations in a self-consistent manner with a finite element method, and presents a systematic simulation-based study on quantum-mechanical effects, gate leakage current of FinFETs. The simulation results indicate that the deviation from the classical model becomes more important as the gate oxide, gate length and Fin channel width becomes thinner and the Fin channel doping increases. Gate tunneling current density reduces with the body thickness decreasing. Excessive scaling increases the gate current below Fin thickness of 5 nm. The gate current can be dramatically reduced beyond 10¹⁷ cm⁻³ with the Fin body doping increasing. In order to understand the influence of electron confinement, quantum mechanical simulation results are also compared with the results from the classical approach. Our simulation results indicate that quantum mechanical simulation is essential for the realistic optimization of the FinFET structure.     

钟控神经MOS管的改进及其在多值电路中的应用

首先对钟控神经MOS管进行研究,提出了相应的改进方法.然后采用此改进的钟控神经MOS管设计了一种新型多值触发器.与传统的触发器相比较,此多值触发器具有结构简单、速度快、功耗低等特点;而且无需改变电路结构就可实现不同基的多值触发器.PSPICE模拟证明了所设计的电路具有正确的逻辑功能.     

Design and Simulation of a Light-Activated Darlington Transistor Based on a SiCGe/3C-SiC Hetero-Structure

针对抗电磁干扰的需要提出了一种由SiCGe/3C-SiC异质结构成的光控达林顿晶体管设计.用多维器件模拟软件ISE对这种新型功率开关进行了特性仿真.结果表明,与采用其他结晶类型的碳化硅衬底相比,SiCGe与3C-SiC间较小的晶格失配有利于提高器件性能,可使其最大共射极电流增益达到890,获得最好的光触发特性和较好的Ⅰ-Ⅴ特性,饱和压降大约为4V.