Implementation of a high speed frequency synthesizer employing a dual input phase accumulator

We present a new PLL based frequency synthesizer, in which we have replaced the conventional phase frequency detector and the dividers (programmable counters) with a sequential dual input phase accumulator (DIPA), consisting of a digital circuit employing adders, registers and a ladder. The main feature of the DIPA is that the two input frequencies are not required to be normalized (divided down) to the step frequency of the synthesizer. Instead, the two different high frequencies, that is the reference and the output frequency of the synthesizer, are applied directly. The DIPA samples and normalizes their phases at very high rates, calculates their phase difference, producing an output that consists of a dc component proportional to the phase difference and harmonics of the two input high frequencies. These harmonics are high frequencies and can easily be rejected by a wide bandwidth filter of the loop, without affecting the high convergence speed of the loop. Moreover, these harmonics do not generate spurs near the output frequency. The resolution of the DIPA based synthesizer depends only on the length of the digital word of the DIPA, and its convergence speed depends on the lower of the two input frequencies. The output of the DIPA is a linear function of the phase difference of the two input frequencies and its dynamic range exceeds the limit of ±2π that governs the conventional phase detectors. Thus, the proposed frequency synthesizer based on the DIPA has low phase noise, no spurs nearby the output frequency, high resolution and fast convergence rate. Additionally, the output frequency can be digitally modulated under the control of the closed loop, either by phase or frequency modulation.     

A methodology for the implementation of MOSFETs with a high-k dielectric gate material on the design of 90 nm technology circuits

Up to date, MOSFETs have been made through well established techniques that use SiO₂ as the gate dielectric and the related design issues are well established. The need to scale down device dimensions allowed researchers to seek for alternative materials, in order to replace SiO₂ as the gate dielectric. The implementation of such MOS devices in memory or logic circuits needs to take into account the effects that the use of the new gate dielectrics has on parameters such as the threshold voltage and the drain current. Hence, parameters such as the high dielectric constant values, extra oxide charges and process related defects at the physical level must be taken into account during the device design. As far as circuit applications are concerned, these changes may substantially affect the required performance. This paper presents and provides proposals about the issue of replacing commonly used parameters of the MOSFET modelling with new parameters, in which the presence of a gate dielectric with different properties from those of SiO₂ is taken into account. A stepwise procedure is described for the new device design. Moreover, a case study is presented which examines a memory circuit built up by such new technology devices. In particular, this paper presents and analyses the design of a DRAM cell made up of MOSFETs with an alternative gate dielectric. The 90 nm technology and the BSIM4 model equations are used to derive the single MOSFET behaviour and subsequently the DRAM circuit performance. The results are analysed and compared to those obtained from conventional SiO₂ devices. A cell layout is provided and the DRAM circuit characteristics are also presented.     

电力电子是风力发电的主要技术

本文回顾风力发电市场，叙述了和传统的电力发电相比，在以后的几年中风能将成为更具竞争力的能源之一。还介绍了固定速度和调整风力发电机以及拓扑结构、不同风力发电系统的比较及控制方案，最后指出风力发电机技术的未来发展趋势是进一步提高功率等级和电力电子技术。     

Organic Solid Solutions: Formation and Applications in Organic Light‐Emitting Diodes

To enhance the performance of organic devices, doping and graded mixed‐layer structures, formed by co‐evaporation methods, have been extensively adopted in the formation of organic thin films. Among the criteria for selecting materials systems, much attention has been paid to the materials' energy‐band structure and carrier‐transport behavior. As a result, some other important characteristics may have been overlooked, such as material compatibility or solubility. In this paper, we propose a new doping method utilizing fused organic solid solutions (FOSSs) which are prepared via high‐pressure and high‐temperature processing. By preparing fused solid solutions of organic compounds, the stable materials systems can be selected for device fabrication. Furthermore, by using these FOSSs, doping concentration and uniformity can be precisely controlled using only one thermal source. As an example of application in organic thin films, high‐performance organic light‐emitting diodes with both single‐color and white‐light emission have been prepared using this new method. Compared to the traditional co‐evaporation method, a FOSS provides us with a more convenient way to optimize the doping system and fabricate relatively complicated organic devices.     

基于仿真平台的“电力电子技术”教学模式探讨

本文针对“电力电子技术”课程教学过程中遇到的电路种类较多、学生难以理解等问题,提出一种基于仿真平台的“电力电子技术”教学模式。文中具体描述了仿真平台的架构,并以单相全控整流电路为例,详细介绍了如何利用仿真软件PSIM开展课程教学。实践结果表明,学生通过仿真平台可以更全面直观深入地理解“电力电子技术”课程学习内容,该仿真平台为课程的教与学提供了一种新的思路和模式。     

Recent Observations on Tin Pest Formation in Solder Alloys

The most recent observations of the response of bulk samples of several lead-free solder alloys, exposed to temperatures below the allotropic transition for tin for extended periods, are reported. Tin pest has been observed in Sn-0.5Cu, Sn-3.5Ag, Sn-3.8Ag-0.7Cu, and Sn-3.0Ag-0.5Cu alloys at both −18°C and −40°C. The process is slow and inconsistent, usually requiring several years, but may eventually result in complete disintegration of the sample. No tin pest was detected in Sn-Zn-3Bi or in the traditional Sn-37Pb solder alloy after exposure for up to 4 and 10 years, respectively. It is suggested that nucleation is affected by local composition and that extremely small amounts of either intentional solute or impurity are influential. Growth of tin pest is accompanied by a large volume change, and it is likely that stress relaxation ahead of the expanding grey tin front is a controlling factor. A stronger matrix would be more resistant in this case, and at the temperatures of exposure Sn-37Pb is stronger than either Sn-3.5Ag or Sn-0.5Cu. The absence of tin pest, to date, on actual joints is attributed to their restricted free surface area and the greater strength associated with very small samples.     

Simplified Large‐Area Manufacturing of Organic Electrochemical Transistors Combining Printing and a Self‐Aligning Laser Ablation Step

A hybrid manufacturing approach for organic electrochemical transistors (OECTs) on flexible substrates is reported. The technology is based on conventional and digital printing (screen and inkjet printing), laser processing, and post‐press technologies. A careful selection of the conductive, dielectric, and semiconductor materials with respect to their optical properties enables a self‐aligning pattern formation which results in a significant reduction of the usual registration problems during manufacturing. For the prototype OECTs, based on this technology, on/off ratios up to 600 and switching times of 100 milliseconds at gate voltages in the range of 1 V were obtained.     

Highly Concentrated and Conductive Reduced Graphene Oxide Nanosheets by Monovalent Cation–π Interaction: Toward Printed Electronics

A novel route to preparing highly concentrated and conductive reduced graphene oxide (RGO) in various solvents by monovalent cation–π interaction. Previously, the hydrophobic properties of high‐quality RGO containing few defects and oxygen moieties have precluded the formation of stable dispersion in various solvents. Cation–π interaction between monovalent cations, such as Na⁺ or K⁺, and six‐membered sp² carbons on graphene were achieved by simple aging process of graphene oxide (GO) nanosheets dispersed in alkali solvent. The noncovalent binding forces introduced by the cation–π interactions were evident from the chemical shift of the sp² peak in the solid ¹³C NMR spectra. Raman spectra and the I‐V characteristics demonstrated the interactions in terms of the presence of n‐type doping effect due to the adsorption of cations with high electron mobility (39 cm²/Vs). The RGO film prepared without a post‐annealing process displayed superior electrical conductivity of 97,500 S/m at a thickness of 1.7 μm. Moreover, mass production of GO paste with a concentration as high as 20 g/L was achieved by accelerating the cation–π interactions with densification process. This strategy can facilitate the development of large scalable production methods for preparing printed electronics made from high‐quality RGO nanosheets.     

读"面向21世纪电工电子系列课程教学内容和课程体系改革的研究与实践总结"后的联想

笔者主要阐述了在阅读电气电子教学学报第23卷第3期中登载的陈笃信教授等的文章后所产生的联想,其中包括：学校的中心任务如何保证,培养人才的目标如何落实,教材的编写如何配合三个部分。