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11.
Greenish yellow organic light-emitting diodes (GYOLEDs) have steadily attracted researcher's attention since they are important to our life. However, their performance significantly lags behind compared with the three primary colors based OLEDs. Herein, for the first time, an ideal host-guest system has been demonstrated to accomplish high-performance phosphorescent GYOLEDs, where the guest concentration is as low as 2%. The GYOLED exhibits a forward-viewing power efficiency of 57.0 lm/W at 1000 cd/m2, which is the highest among GYOLEDs. Besides, extremely low efficiency roll-off and voltages are achieved. The origin of the high performance is unveiled and it is found that the combined mechanisms of host-guest energy transfer and direct exciton formation on the guest are effective to furnish the greenish yellow emission. Then, by dint of this ideal host-guest system, a simplified but high-performance hybrid white OLED (WOLED) has been developed. The WOLED can exhibit an ultrahigh color rendering index (CRI) of 92, a maximum total efficiency of 27.5 lm/W and a low turn-on voltage of 2.5 V (1 cd/m2), unlocking a novel avenue to simultaneously achieve simplified structure, ultrahigh CRI (>90), high efficiency and low voltage. 相似文献
12.
Aiming to environment protection, green solvents are crucial for commercialization of solution-processed optoelectronic devices. In this work, d-limonene, a natural product, was introduced as the non-aromatic and non-chlorinated solvent for processing of polymer light-emitting diodes (PLEDs) and organic field effect transistors (OFETs). It was found that d-limonene could be a good solvent for a blue-emitting polyfluorene-based random copolymer for PLEDs and an alternating copolymer FBT-Th4(1,4) with high hole mobility (μh) for OFETs. In comparisons to routine solvent-casted films of the two conjugated polymers, the resulting d-limonene-deposited films could show comparable film qualities, based on UV–vis absorption spectra and observations by atomic force microscopy (AFM). With d-limonene as the processing solvent, efficient blue PLEDs with CIE coordinates of (0.16, 0.16), maximum external quantum efficiency of 3.57%, and luminous efficiency of 3.66 cd/A, and OFETs with outstanding μh of 1.06 cm2 (V s)−1 were demonstrated. Our results suggest that d-limonene would be a promising non-aromatic and non-chlorinated solvent for solution processing of conjugated polymers and molecules for optoelectronic device applications. 相似文献
13.
Kai Xu Zhenchang Tang Yan Zhang Wanshu Li Haiou Li Lihui Wang Liming Liu Honghang Wang Feng Chi Xiaowen Zhang 《Current Applied Physics》2019,19(10):1076-1081
Germanium dioxide (GeO2) aqueous solutions are facilely prepared and the corresponding anode buffer layers (ABLs) with solution process are demonstrated. Atomic force microscopy, X-ray photoelectron spectroscopy and ultraviolet photoelectron spectroscopy measurements show that solution-processed GeO2 behaves superior film morphology and enhanced work function. Using GeO2 as ABL of organic light-emitting diodes (OLEDs), the visible device with tris(8-hydroxy-quinolinato)aluminium as emitter gives maximum luminous efficiency of 6.5 cd/A and power efficiency of 3.5 lm/W, the ultraviolet device with 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole as emitter exhibits short-wavelength emission with peak of 376 nm, full-width at half-maximum of 42 nm, maximum radiance of 3.36 mW/cm2 and external quantum efficiency of 1.5%. The performances are almost comparable to the counterparts with poly (3,4-ethylenedioxythiophene):poly (styrenesulfonate) as ABL. The current, impedance, phase and capacitance as a function of voltage characteristics elucidate that the GeO2 ABL formed from appropriate concentration of GeO2 aqueous solution favors hole injection enhancement and accordingly promoting device performance. 相似文献
14.
1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm2 is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm2 array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall Vmin of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances. 相似文献
15.
铁电存储器的研究进展 总被引:1,自引:1,他引:0
介绍了铁电存储器的存储原理,同时对两种铁电存储器(铁电随机存取存储器和铁电场效应晶体管存储器)的研究进展、当前存在的问题以及我国目前在这一领域的研究现状进行了简单介绍,并对今后的技术发展进行了展望。 相似文献
16.
进入21世纪,随着集成电路的发展,SoC(System on Chip)片上系统应运而生。而作为SoC重要组成部分的嵌入式存储器,在SoC中所占的比重正逐步增加,并起着越来越重要的作用,那么嵌入式存储器与独立的存储器芯片在设计上存在着哪些差异?对此本文将以NOR型闪存为例在制造工艺的选取、衍生产品的设计、功耗与噪声、后端功能仿真、测试与修复等方面进行分析和研究。 相似文献
17.
18.
单片机中断多优先级的软件扩展方法 总被引:1,自引:0,他引:1
为了解决MCS-51系列单片机只能由IP寄存器设定两级优先级的问题 ,文中给出了利用软件对中断优先级进行扩展的方法 ,同时给出了高于两个优先级的多优先级软件扩展程序。 相似文献
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20.
A mixed mode digital/analog special purpose VLSI hardware implementation of an associative memory with neural architecture is presented. The memory concept is based on a matrix architecture with binary storage elements holding the connection weights. To enhance the processing speed analog circuit techniques are applied to implement the algorithm for the association. To keep the memory density as high as possible two design strategies are considered. First, the number of transistors per storage element is kept to a minimum. In this paper a circuit technique that uses a single 6-transistor cell for weight storage and analog signal processing is proposed. Second, the device precision has been chosen to a moderate level to save area as much as possible. Since device mismatch limits the performance of analog circuits, the impact of device precision on the circuit performance is explicitly discussed. It is shown that the device precision limits the number of rows activated in parallel. Since the input vector as well as the output vector are considered to be sparsely coded it is concluded, that even for large matrices the proposed circuit technique is appropriate and ultra large scale integration with a large number of connection weights is feasible. 相似文献