Parallel feedforward class-AB control circuits for low-voltage bipolar rail-to-rail output stages of operational amplifiers

A new family of class-AB control circuits for bipolar rail-to-rail output stages of operational amplifiers is presented. Step by step, we report the development of five simple class-AB control circuits showing the advantages of using parallel feedforward. The circuits have been designed in such a way that temperature, supply voltage and process parameters have little influence. To test the output stages, one of them has been implemented in a very simple two-stage operational amplifier on a semi-custom chip. Measurements show a bandwidth of 2.5 MHz, a gain of 40 dB, a quiescent current of 23µA and a maximum output current of 250µA. Simulation results of three other simple operational amplifiers with the new class-AB control circuits are shown, which have a higher gain and maximum output current.     

初论带状光纤缆结构设计

推导出了成叠带状光纤在松套管中余长的两个计算公式，此两公式是带状光纤缆结构设计需要用到的基本公式。此外，还对带状光纤缆结构设计作了初步讨论。     

上下行信号平衡与蜂窝小区设计

本文从无线电通信基本要素出发 ,阐述上行信号和下行信号的无线传播 ,得出上下行信号平衡链路方程 ,并以我国普遍使用的TACS系统和GSM系统为例 ,着重讨论了信号平衡与蜂窝小区设计之间的关系。     

Partial scan design and test sequence generation based on reduced scan shift method

This paper presents a partial scan algorithm, calledPARES (PartialscanAlgorithm based onREduced Scan shift), for designing partial scan circuits. PARES is based on the reduced scan shift that has been previously proposed for generating short test sequences for full scan circuits. In the reduced scan shift method, one determines proch FFs must be controlled and observed for each test vector. According to the results of similar analysis, PARES selects these FFs that must be controlled or observed for a large number of test vectors, as scanned FFs. Short test sequences are generated by reducing scan shift operations using a static test compaction method. To minimize the loss of fault coverage, the order of test vectors is so determined that the unscanned FFs are in the state required by the next test vector. If there are any faults undetected yet by a test sequence derived from the test vectors, then PARES uses a sequential circuit test generator to detect the faults. Experimental results for ISCAS'89 benchmark circuits are given to demonstrate the effectiveness of PARES.     

Cost-effective smart power CMOS/DMOS technology: design methodology for latch-up immunity

To answer to the need of a cost effective smart power technology, an original design methodology that permits implementing latch-up free smart power circuits on a very simple CMOS/DMOS technology is proposed. The basic concept used to this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up. The efficiency of the design methodology is experimentally shown.     

集群移动通信系统的组网设计

本文对集群移动通信系统在组网设计时应考虑的问题进行了分析，并提出了具体步骤和方法，可供集群系统组网设计时参考。     

锥形有源条半导体光放大器增益和饱和特性分析

以行波半导体光放大器速度方程为基础，采用传输矩阵方法，对锥形结构半导体光放大器的增益和饱和特性进行理论研究。讨论了不同锥形长度，不同结构时的增益和饱和特性差异。理论研究表明，锥形结构能改善半导体光放大器的偏振灵敏度。在同一锥度下，长锥形长度能提高饱和增益，降低偏振度。在进行半导体光放大器有源条结构设计时要综合考虑锥度及锥形长度的影响，以实现结构优化 。     

Low-Power Adaptive Biased Integrated Amplifiers

In this paper the author will present the working principle and the applications of a novel adaptive biasing topology, designed to decrease the stand-by power dissipation without affecting the transient performance of low-power amplifiers. The proposed circuit, whose principle and circuit topology can be implemented both in CMOS and in bipolar standard technologies, gives a biasing current whose value depends on the applied input differential voltage and can be set according to the requested transient performance constraints. The adaptive architecture can be utilized in the design of high-efficient low-power operational amplifiers, for the biasing of both the input stage (where the input source current is dynamically increased) and the output stage (where the output current can be controlled and limited). These amplifiers show a very good behaviour, evaluated in terms of two efficiency factors, if compared with those of other adaptive solutions and class-AB topologies, proposed in the literature. Simulation results and also measurements on a chip prototype, fabricated in a standard CMOS technology, are finally presented.     

浅谈基于ISO9000的质量管理信息系统设计

讲述了一个军工产品承制单位基于ＩＳＯ９０００体系，建立质量管理信息系统的概况。     

多功能键盘设计

文中讨论的是多功能键盘，它是以ＡＴ８９Ｃ２０５１单片机为控制器，带有本地键盘和远程无线遥控键盘，适用于特殊场合的一种微机系统智能键盘。文中较详细地介绍了多功能键盘的设计思想、工作原理及软件控制过程等。