混合信号电子产品的自动测试技术

电子产品微型化使自动测试成为必然,而边界扫描技术则使自动测试成为可能。文章分析了1149.4和1149.1标准的测试访问端口,以及测试逻辑结构和测试协议的异同,提出了模拟边界扫描单元ABM和数字边界扫描单元DBM的行为模型;在此基础上,详细阐述了两个标准在混合信号电子产品自动测试中的综合应用方法;最后,以典型的混合信号电路D/A转换器为例,对两个标准的综合应用进行了仿真验证。     

手机用TFT-LCD驱动控制芯片的测试电路结构设计

文章从分析手机用TFT-LCD驱动控制芯片的测试需求和芯片结构出发，提出了一种针对该芯片的测试电路结构设计方案。该方案采用多条扫描链对芯片内的多个异构的模块进行隔离，保证了各个模块有较高的测试独立性。考虑到内置SRAM的特殊性，采用边界扫描方式进行测试，提高了测试的灵活性，减少了测试电路的面积。电平敏化扫描链的引入．大大提高了Source Driver测试的可控制性。该方案支持手机用TFT-LCD驱动控制芯片的常规以及特殊项目的测试。     

The test search for true mixed-signal cores

The well-known method towards testing mixed-signal cores is functional testing and essentially measuring key parameters of the core. However, especially if performance requirements increase, and embedded cores are considered, functional testing becomes technically and economically less attractive. A more cost-effective approach could be accomplished by a combination of reduced functional tests and added structural tests. In addition, it will also improve the debugging options for cores. Basic problem remains the large computational effort for analogue structural testing. In this paper, we introduce the concept of Testability Transfer Function for both analogue as well as digital parts in a mixed-signal core. This opens new possibilities for efficient structural testing of embedded mixed-signal cores, thereby adding to the quality of tests and/or enhanced diagnostic capabilities.     

一种数模混合集成电路衬底耦合参数快速提取算法

边界元方法在计算衬底耦合电阻时，需要直接求解稠密矩阵方程Х＝Ｚ．Ｉ，时间复杂度为Ｏ（Ｎ＾３），Ｎ是总的衬底端口单元数，使得能计算的电路规模受到很大的限制。根据阻抗矩阵Ｘ中元素的物理意义，采用分段曲线拟合的方法。把它很好地表示成距离倒数的项式形式。在此基础上，采用多极点ＧＭＲＥＳ算法迅速求解Х＝Ｚ．Ｉ矩阵方程。时间复杂度为Ｏ（Ｎ），而结果和直接求解的结果非常接近。     

A mixed-signal demodulator for a low-complexity IR-UWB receiver: Methodology, simulation and design

This works presents an integrated CMOS 2-PPM demodulator based on a switched capacitor network for an energy detection impulse-radio UWB receiver. The circuit has been designed using a top-down methodology that allows to discover the impact of low-level non-idealities on system-level performance. Through the use of a mixed-signal simulation environment, performance figures have been obtained which helped evaluate the influence at system level of the non-idealities of the most critical block. Results show that the circuit allows the replacement of the ADC typically employed in energy detection receivers and provides about infinite equivalent quantization resolution. The demodulator achieves 190 pJ/bit at 1.8 V.     

Analog built-in saw-tooth generator for ADC histogram test

This paper presents an analog built-in saw-tooth generator to be used for linear histogram test of ADCs. The internal generation of a highly linear signal with precise amplitude control relies on the use of an original calibration scheme. The effectiveness of the calibration procedure is evaluated through simulations and results demonstrate that ramp signals with a linearity of 15 bits and an average slope error of 0.4% can be achieved. In addition, the proposed implementation exhibits a very low silicon area, making the generator suitable for BIST application.     

Oscillation-based test in oversampled ΣΔ modulators

This paper discusses a way of applying the oscillation-based test (OBT)/oscillation-based built-in-self test concept to oversampled ΣΔ modulators, exploiting previous experience coined through the implementation of OBT in SC integrated filters. Analytical and simulation results demonstrate that it is always feasible to find out an OBT configuration for a typical discrete-time second-order modulator structure without adding a substantial extra circuitry, but only resorting to local feedback loops. A feedback strategy can be chosen providing enough freedom to force oscillations, which can be worthwhile for testing purposes. The selected oscillation parameters allow us to establish criteria for a high fault coverage.     

Multistage opto-neuromorphic process system based on commercial optoelectric devices

This paper proposes a structure for opto-neuromorphic processes by using multistage connections of photo-transmitters. The basic unit consists of a light-emitting diode and a photoresistor for a non-inverting photo signal processor. By constructing a cascade structure of these basic units, multistage photo transmission of input light signal is examined in pulse signals with various periods and duty cycles as the input to the first opto-neuromorphic stage. This approach verifies that optical signals can be transmitted through our proposed structure and that by controlling the amount of the transmitted light between the basic units, the gain between stages can be controlled. It is demonstrated that this structure can be used for opto-neuromorphic processes by transmitting light signals as if transmitting signals between neurons with different weights and activation patterns. The proposed structure can be modified with an inverter circuit to build a photo-inverter and by using a combination of photo-transmitter and photo-inverters, it can serve as the basic structure to build more complicated opto-neuromorphic process systems.     

一种模数混合电路故障诊断新方法

把模拟电路故障诊断的子网络撕裂诊断法与数字电路故障诊断的伪穷举测试法相结合．提出了一种应用于模数混合电路的故障诊断方法。其诊断思想是把串联形式的混合电路，划分成模拟和数字电路两部分．并分别进行诊断。该方法计算量小、诊断定位精度高，适合于工程应用。     

一种数模混合电路状态的波形分析方法

本文针对数模混合电路仿真波形的特点,提出一种以开关事件为基础的状态序列数据结构,有效地压缩存储空间;同时,基于这种数据结构,本文还提出一种仿真波形比较方法,该方法根据仿真波形自动检测划分电路的状态,并能在考虑一定容限范围的前提下实现波形比较,有效地提高了模拟信号以及数字信号完整性的验证效率.这种方法已成功运用到本文开发的数模混合时移波形比较软件系统中,并已在Intel技术开发(上海)公司内部推广使用.