排序方式: 共有55条查询结果,搜索用时 15 毫秒
51.
52.
本论文实现了频率为7.656GHz全集成正交输出CMOS锁相环。该锁相环可以用作MB-OFDM超宽带频率综合器的一个基本模块。为了使环路快速稳定,该锁相环采用整数型结构,指定输入参考频率为66MHz,并且采用了一个宽带的正交压控振荡器,把两个交叉耦合LC压控振荡器通过底部串联耦合来产生正交载波。在0.18微米CMOS工艺和1.5V电源电压下,该锁相环消耗电流16mA(包含驱动电路),测得相位噪声在1MHz频偏处为-109 dBc/Hz。其中测得正交压控振荡器的频率调谐范围为6.95GHz至8.73GHz。整个芯片的核心面积为1×0.5mm2。 相似文献
53.
正A monolithic RF transceiver for an MB-OFDM UWB system in 3.1-4.8 GHz is presented.The transceiver adopts direct-conversion architecture and integrates all building blocks including a gain controllable wideband LNA,a I/Q merged quadrature mixer,a fifth-order Gm-C bi-quad Chebyshev LPF/VGA,a fast-settling frequency synthesizer with a poly-phase filter,a linear broadband up-conversion quadrature modulator,an active D2S converter and a variablegain power amplifier.The ESD protected transceiver is fabricated in Jazz Semiconductor's 0.18-μm RF CMOS with an area of 6.1 mm~2 and draws a total current of 221 mAfrom 1.8-V supply.The receiver achieves a maximum voltage gain of 68 dB with a control range of 42 dB in 6 dB/step,noise figures of 5.5-8.8 dB for three sub-bands,and an inband /out-band IIP_3 better than-4 dBm/+9 dBm.The transmitter achieves an output power ranging from-10.7 to-3 dBm with gain control,an output P_(1dB) better than-7.7 dBm,a sideband rejection about 32.4 dBc,and LO suppression of 31.1 dBc.The hopping time among sub-bands is less than 2.05 ns. 相似文献
54.
降低MB-OFDM认知无线电带外干扰的编码调制方法及其性能分析 总被引:1,自引:1,他引:0
该文针对降低多频带正交频分复用(MB-OFDM)认知无线电系统带外干扰的要求,利用数学推导的方法,得出带外干扰的表达式,提出了一种以两个、四个或多个子载波分组的编码调制方法。该方法增大了带外信号衰减速度,从而产生满足要求的频谱凹槽深度,有效地降低对周围无线业务的干扰,最终达到认知系统和其它窄带系统的共存。另外,理论分析和仿真结果表明该编码调制具有另一个优点:Rayleigh信道中,一定的信噪比下可以获得更好的误码率性能。 相似文献
55.