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41.
The main equipmets of the HL-2A LHCD power supply are based on the old one, but the logical control protective system is a new part. Considering the output voltage is very high(up to 60 kV), so the logical control protective system is very important. The system is implemented based on PLC and the SIEMENS STEP7 software.  相似文献   
42.
We deal with the problem of designing the logical topology in IP-over-WDM networks. Many conventional methods for designing the logical topology assume that a constant number of wavelengths will be available on each fiber. But it is not necessary to utilize all wavelengths on each fiber in building an effective logical topology on a WDM network. Instead, several wave-bands may be considered for introduction while deploying additional wave-bands and their corresponding optical amplifiers when additional wavelengths are actually required. In this case, the number of wavelengths available on the respective fibers depends on the number of optical fiber amplifiers deployed on each fiber. In this paper, we propose a heuristic algorithm for the design of a logical topology with as few optical fiber amplifiers as possible. Our results indicate that our algorithm reduces the number of optical fiber amplifiers with a slight increase of average packet delays.  相似文献   
43.
邵宇挺  罗斌  潘炜 《激光技术》2009,33(3):314-314
为了实现基于半导体光放大器的全光逻辑与门,采用了在半导体光放大器构成的马赫-曾德尔干涉仪的基础上,注入外部连续光的方法。以半导体光放大器速率方程为基础,对设计方案进行了理论分析和仿真验证,取得了不同重复周期、不同脉冲宽度的光脉冲序列经过全光逻辑与门操作后的输出数据。结果表明,该方案能对传输速率为10Gbit/s或以下的信号进行正确与运算,同时,外光注入可以有效提高半导体光放大器信号处理速度。这一结果对基于半导体光放大器的全光逻辑的设计是有帮助的。  相似文献   
44.
电荷耦合器件(CCD)作为一种新型的光电器件被广泛地应用于非接触测量物体尺寸。CCD通过必要的光学系统和适合的驱动电路完成光电转换,将物体在空间域分布的光学图像转换成一列按时间域分布的电脉冲信号。以线阵CCD图像传感器TCD1251UD为例,设计了视频信号预处理电路,并采用可编程逻辑器件FPGA实现积分时间和频率同时可调的CCD驱动程序,完成了对CCD输出信号的数据采集。实验结果证明时序脉冲能够驱动CCD完成光电转换功能,数据采集电路能够采集到需要的信号数据。  相似文献   
45.
By means of Logic symmetric relation,the single neighboring Logic path for Ndimensions Boolean ordered set is solved.A new method of determining any logic neighboringsubset in limited dimension is proposed.Its results are intuitional and realizable for computer.  相似文献   
46.
The world runs on networks over which signals communicate sequences of symbols, e.g. numerals. Examining both engineered and natural communications networks reveals an unsuspected order that depends on contact with an unpredictable entity. This order has three roots. The first is a proof within quantum theory that no evidence can ever determine its explanation, so that an agent choosing an explanation must do so unpredictably. The second root is the showing that clocks that step computers do not “tell time” but serve as self-adjusting symbol-handling agents that regulate “logically synchronized” motion in response to unpredictable disturbances. Such a clock-agent has a certain independence as well as the capacity to communicate via unpredictable symbols with other clock-agents and to adjust its own tick rate in response to that communication. The third root is the noticing of unpredictable symbol exchange in natural systems, including the transmission of symbols found in molecular biology. We introduce a symbol-handling agent as a role played in some cases by a person, for example a physicist who chooses an explanation of given experimental outcomes, and in other cases by some other biological entity, and in still other cases by an inanimate device, such as a computer-based detector used in physical measurements. While we forbear to try to explain the propensity of agents at all levels from cells to civilizations to form and operate networks of logically synchronized symbol-handling agents, we point to this propensity as an overlooked cosmic order, an order structured by the unpredictability ensuing from the proof. Appreciating the cosmic order leads to a conception of agency that replaces volition by unpredictability and reconceives the notion of objectivity in a way that makes a place for agency in the world as described by physics. Some specific implications for physics are outlined.  相似文献   
47.
Hot ice computer     
We experimentally demonstrate that supersaturated solution of sodium acetate, commonly called ‘hot ice’, is a massively-parallel unconventional computer. In the hot ice computer data are represented by a spatial configuration of crystallization induction sites and physical obstacles immersed in the experimental container. Computation is implemented by propagation and interaction of growing crystals initiated at the data-sites. We discuss experimental prototypes of hot ice processors which compute planar Voronoi diagram, shortest collision-free paths and implement and and or logical gates.  相似文献   
48.
As the technology node continues to scale, soft errors have become a major issue for reliable processor designs. In this paper, we propose a framework that accurately and efficiently estimates the Architectural Vulnerability Factor (AVF) of critical storage structures of a processor. The proposed approach exploits the masking effects between array structure (e.g., register files and Caches) and logic units (e.g., Int-ALU) via the unified Probabilistic Graphical Models (PGM) methodology, and can provide guaranteed AVFs by two accuracy–efficiency tradeoff solutions. The experimental results have confirmed that, compared to current state-of-the-art approaches, the proposed framework achieves accurate and efficient estimation via two instanced solutions: (1) first-order masking effects up to 45.96% and on average 8.48% accuracy improvement with 52.01× speedup; (2) high-order masking effects average 87.28% accuracy improvement with 43.87× speedup. The two different accuracy–efficiency tradeoff of proposed MEA-PGM can be applied into different estimation scenarios (e.g., short time to market of general mobile devices and high reliable requirements in aerospace platforms) in flexibility.  相似文献   
49.
Considerable effort has been expended in the EDA community during the past decade in trying to cope with the so-called statistical timing problem. In this paper, we not only present a fast and approximate gate delay model called stochastic logical effort (SLE) to capture the effect of statistical parameter variations on the delay but also combine this model with a previously proposed transistor level smart Monte Carlo method to construct ISLE timing yield estimator. The results demonstrate that our approximate SLE model can capture the delay variations and ISLE achieves the same accuracy as the standard Monte Carlo estimator with a cost reduction of about 180× on the average for ISCAS’85 benchmark circuits and in the existence of both inter- and intra-die variations.  相似文献   
50.
We study an optimal design problem for serial machining lines. Such lines consist of a sequence of stations. At every station, the operations to manufacture a product are grouped into blocks. The operations within each block are performed simultaneously by the same spindle head and the blocks of the same station are executed sequentially. The inclusion and exclusion constraints for combining operations into blocks and stations as well as the precedence constraints on the set of operations are given. The problem is to group the operations into blocks and stations minimizing the total line cost. A feasible solution must respect the given cycle time and all given constraints. In this paper, a heuristic multi-start decomposition approach is proposed. It utilizes a decomposition of the initial problem into several sub-problems on the basis of a heuristic solution. Then each obtained sub-problem is solved by an exact algorithm. This procedure is repeated many times, each time it starts with a new heuristic solution. Computational tests show that the proposed approach outperforms simple heuristic algorithms for large-scale problems.  相似文献   
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