Comparative Assessment of Adaptive Body-Bias SOI Pass-Transistor Logic

A very low voltage transconductor for video frequency range applications and compatible with standard CMOS technology is described. In the proposed transconductor, except the DC level shifter circuit (DCLS), the whole transconductor uses the main supply voltage [which can be as low as 1.5 V in a standard 0.6 μm CMOS technology] while the DCLS uses a simple charge-pump circuit as its supply voltage and has a very low current consumption. In addition, proper common-mode sense and charge-pump circuits are developed for this low-voltage application. Meanwhile, some techniques to improve the frequency response, linearity, and noise performance of the proposed transconductor are described. In a standard 0.6 μm CMOS technology and single 1.5 V supply, simulations show that the proposed transconductor futures a THD of −50 dB for 1.4 V_pp and 10 MHz input signal and −60 dB for 1.4 V_pp and 1 MHz signal where the threshold voltage of MOS transistors could be as high as 1 V. Based on the proposed transconductor, a lowpass filter with 700 kHz to 8 MHz programmable cutoff frequency and a bandpass 10.7 MHz second order filter were implemented. Armin Tajalli received the B.Sc. from Sharif University of Technology (SUT), Tehran, Iran, in 1997, and M.Sc. from Tehran Polytechnic University, Tehran, Iran, in 1999. From 1998 he has joint Emad Co. as a senior design engineer were he has worked on several industrial and R&D projects on analog and mixed-mode ICs. He received the award of the Best Design Engineer from Emad Co., 2001, the Kharazmi Award of Industrial Research and Development, Iran, 2002, and Presidential Award of the Best Iranian Researchers, in 2003. He is now working toward his PhD degree at SUT. His current interests are design of high speed circuits for telecommunication systems. Mojtaba Atarodi received the B.S.E.E. from Amir Kabir University of Technology (Tehran Polytechnic) in 1985, and M.Sc. degree in electrical engineering from the University of California, Irvine, in 1987. He received the Ph.D. degree from the University of Southern California (USC) on the subject of analog IC design in 1993. From 1993 to 1996 he worked with Linear Technology Corporation as a senior analog design engineer. Since then, he has been consulting with different IC companies. He is currently a visiting professor at Sharif University of Technology. He has published more than 30 technical papers in the area of analog and mixed-signal integrated circuit design as well as analog CAD tools.     

Frequency Specification Testing of Analog Filters Using Wavelet Transform of Dynamic Supply Current

Wavelet transform has the property of resolving signal in both time and frequency unlike Fourier transform. In this work, we show that time-domain information obtained from wavelet analysis of supply current can be used to test the frequency specification of analog filters efficiently. The pole/zero locations in the frequency response of analog filters shift due to change in component values with process variations. It is essential to test the filters for the shift in frequency response and fix it during production test. Wavelet analysis of supply current can be a promising alternative to test frequency specification of analog filters, since it needs only one AC stimulus and is virtually unaffected by transistor threshold variation. Simulation results on two test circuits demonstrate that we can estimate pole/zero shift with less than 3% error using only one measurement, which requires about 18 measurements in the conventional technique.Swarup Bhunia received the undergraduate degree from Jadavpur University, Calcutta, India, and the Masters degree from the Indian Institute of Technology (IIT), Kharagpur. He is currently working toward the Ph.D. degree in the Department of Electrical Engineering, Purdue University, West Lafayette, IN, USA. He has worked in the EDA industry on RTL synthesis and verification for about three years. His research interest includes design methodologies for high-performance low-power testable VLSI system, defect-based testing, noise analysis, and noise-aware design.Arijit Raychowdhury received the B.E. degree in 2001 in electronics and telecommunication engineering from Jadavpur University, India. He is currently pursuing the Ph.D. degree in electrical and computer engineering in Purdue University, West Lafayette, IN, USA. He has worked as an analog circuit designer in Texas Instruments India. His research interests include device/circuit design for scaled silicon and nonsilicon devices. He has received academic excellence awards in 1997, 2000, and 2001 and Messner Fellowship from Purdue University in 2002. Mr. Raychowdhury has been awarded the Best Student Paper Award in the IEEE Nanotechnology Conference, 2003.Kaushik Roy received the B.Tech. degree in electronics and electrical communications engineering from the Indian Institute of Technology, Kharagpur, India, and the Ph.D. degree from the Electrical and Computer Engineering Department, University of Illinois, Urbana, in 1990. He was with the Semiconductor Process and Design Center of Texas Instruments, Dallas, TX, where he worked on FPGA architecture development and low-power circuit design. He joined the electrical and computer engineering faculty, Purdue University, West Lafayette, IN, in 1993, where he is currently a Professor. His research interests include VLSI design/CAD with particular emphasis in low-power electronics for portable computing and wireless communications, VLSI testing and verification, and reconfigurable computing. He has published more than 250 papers in refereed journals and conferences, holds six patents, and is Co-Author of a book on Low Power CMOS VLSI Design (New York: Wiley). He was Guest Editor for a Special Issue on Low-Power VLSI in IEE Proceedings Computers and Digital Techniques (July 2002). Dr. Roy received the National Science Foundation Career Development Award in 1995, the IBM Faculty Partnership Award, AT&T/Lucent Foundation Award, Best Paper Awards at the 1997 International Test Conference and 2000 International Symposium on Quality of IC Design, 2003 IEEE Latin American Test Workshop, and 2003 IEEE Nano. He is on the Editorial Board of IEEE Design and Test, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, and IEEE TRANSACTIONS ON VLSI SYSTEMS. He was Guest Editor for a Special Issue on Low-Power VLSI in IEEE DESIGN AND TEST (1994), and for the IEEE TRANSACTIONS ON VLSI SYSTEMS (June 2000).     

Vectorial Approach to Fast Correlation Attacks

A new, vectorial approach to fast correlation attacks on binary memoryless combiners is proposed. Instead of individual input sequences or their linear combinations, the new attack is targeting subsets of input sequences as a whole thus exploiting the full correlation between the chosen subset and the output sequence. In particular, the set of all the input sequences can be chosen as the target. The attack is based on a novel iterative probabilistic algorithm which is also applicable to general memoryless combiners over finite fields or finite rings. To illustrate the effectiveness of the introduced approach, experimental results obtained for random balanced combining functions are presentedMost of this work was done while he was with Rome CryptoDesign Center, Gemplus, Italy     

变窗长自适应算法

基于快速横向滤波器结构，本文提出一种可变窗长自适应算法，该算法比滑动窗协方差算法具有更强的跟踪时变环境的能力。     

无绳电话用声表面波滤波器

本文讨论了研制的两种无绳电话机用声表面波滤波器，中心频率为４６．５７ＭＨｚ和４９．９ＭＨｚ；△ｆ＿（－３ｄＢ）＝１．７ＭＨＺ；插损≤１０ｄＢ；△ｆ＿（－４０ｄＢ）／△ｆ＿（－３ｄＢ）≤３．５；阻带抑制≤－４０ｄＢ。采用了低插损的三换能器结构。输入叉指换能器采用了波阵面均匀的孔径加权和相位加权，减小了变迹损耗。理论计算与实验结果一致。     

Organizational Modes of Large-Scale Vortices in an Axisymmetric Turbulent Jet

Large vortices occurring in the axial plane of a self-similar axisymmetric turbulent jet are educed by spatially filtering PIV data. First, the instantaneous PIV frame is convolved with a Gaussian kernel to obtain a smooth (low-pass) field. Next, the low-pass field is Galilean transformed to expose the large vortices residing near the edges of the jet. Large vortices tend to organize themselves in preferred modes; evidence of ring and helical modes is revealed by Galilean transformation of the low-pass filtered field. Both modes seem to occur prominently in jets, with the helical mode being the more frequent. The overall diameter of both ring and helical modes is comparable with the local jet width. The low-pass field occasionally exhibits arrowhead shaped structures with large entrainment at their downstream tips. Stochastic estimates computed from the Galilean-transformed low-pass filtered field indicate that jet meander and a sweep-in of ambient fluid are sufficient to reconstruct large vortices. The frequency of occurrence of modes agrees with previously quoted results. This revised version was published online in July 2006 with corrections to the Cover Date.     

单负材料一维光子晶体的透射谱特性

利用传输矩阵法研究了单负材料一维光子晶体(AB)m(ADBDB)n(AB)mA的透射谱,发现:透射谱中出现2个共振隧穿模,其位置和间距可由周期数m或n,以及介质层厚度d调节控制。改变m,会出现2个恒定间距的共振隧穿模;改变dA,共振隧穿模间距增大,且当dA≥25mm时,间距增大加剧;改变n,共振隧穿模逐渐趋于简并,当n≥6时,两隧穿模合二为一;改变dD,两共振隧穿模亦逐渐趋于简并,当dD≥20mm时,两隧穿模亦合二为一。这些特性可为利用光子晶体设计可调性高品质单通道、双通道滤波器提供参考。     

1维圆柱掺杂光子晶体的滤波性能

为了研究1维圆柱掺杂光子晶体的滤波性质,利用光波在1维圆柱掺杂光子晶体中径向受限的条件,推导出光波在1维圆柱掺杂光子晶体中各个模式满足的关系式,研究了TE波和TM波各模式的缺陷模随模式量子数和杂质光学厚度的变化规律。TE波和TM波的缺陷模频率都随模式量子数的增加而增大;同一模式TE波和TM波的缺陷模频率都随杂质光学厚度的增加而减小。利用缺陷模随模式量子数的变化规律可以实现多通道滤波,利用缺陷模随杂质光学厚度的变化规律可以实现调谐滤波。     

数字图像技术的数字滤光方法在图像测温中的应用

针对在比色测温法中由CCD光谱响应带宽引起的误差,提出了数字滤光的误差校正方法。该方法利用数字图像技术将光谱曲线离散化,采用离散化数据模型展开比色测温计算,在540±10nm绿光段和640±10nm红光段分别加入数字滤光算法,测温误差与外光路搭载滤光片效果接近。该方法简单实用,精度较高,在无外置滤光光路情况下实现了彩色CCD摄像设备的辐射测温,可为图像测温产品的便携性和适用化带来便利。