CSP引发内存封装技术的革命

本文简要介绍了几种内存芯片封装技术的特点。CSP是内存芯片封装技术的新概念,它的出现促进内存芯片的发展和革新,并将成为未来高性能内存的最佳选择     

基于多类运动想象任务的EEG信号分类研究

针对多类运动想象脑电信号个体差异性强和分类正确率比较低的问题,提出了一种时-空-频域相结合的脑电信号分析方法：首先利用小波包对EEG原始信号进行分解,根据EEG信号的频域分布提取出运动想象脑电节律,通过“一对多”共空间模式（CSP）算法对不同运动想象任务的脑电节律进行空间滤波提取特征;然后将特征向量输入到“一对多”模式下的支持向量机（SVM）中,并利用判断决策函数值的方法对SVM的输出结果进行融合;最后通过引入时间窗对脑电信号进行时域滤波,消除运动想象开始和结束时脑电的波动,进一步提高信号信噪比和算法的分类效果。实验结果显示：在时间窗为2s时,平均最大 系数达到了0.72,比脑机接口竞赛第一名提高了0.15,验证了该算法能够有效减小脑电信号个体差异性影响,提高多类识别正确率。     

当前SMT环境中的热门先进技术

表面贴装技术自80年代以来以在电子工业中得到了广泛应用和发展,现简要介绍了当前SMT环境中的一些热门先进技术。     

从内容服务看数据业务计费模式的发展

核心语音业务每用户平均收益(ARPU)的不断下降促使运营商纷纷开始寻求新的收入增长来源。SMS服务和增强型消息服务虽是眼下运营商无线数据业务的主要来源，但其它无线内容服务的市场潜力亦不可低估。无线内容服务市场的发展要求运营商根据用户的实际需求制定新的规则和商业模式以推动内容服务价值链的延伸。此外。运营商还应根据内容服务对计费系统的关键要求有针对性地打造适合于内容服务的计费平台并对内容服务价值链中的合作伙伴关系进行有效的管理。     

先进封装技术的发展与机遇

论文综述了自1990年代以来迅速发展的先进封装技术,包括球栅阵列封装(BGA)、芯片尺寸封装(CSP)、圆片级封装(WLP)、三维封装(3D)和系统封装(SiP)等项新技术;同时,叙述了我国封装产业的状况和发展趋势;并对我国快速发展先进封装技术提出了一些思索和建议.     

Reliability of lead-free interconnections under consecutive thermal and mechanical loadings

To simulate more realistically the effects of strains and stresses on the reliability of portable electronic products, lead-free test assemblies were thermally cycled (−45°C/+125°C, 15-min. dwell time, 750 cycles) or isothermally annealed (125°C, 500 h) before the standard drop test. The average number of drops to failure increased when the thermal cycling was performed before the drop test (1,500 G deceleration, 0.5 ms half-sine pulse). However, the difference was not statistically significant due to the large dispersion in the number of drops to failure of the assemblies drop tested after the thermal cycling. On the other hand, the average number of drops to failure decreased significantly when the isothermal annealing was carried out before the drop test. The failure analysis revealed four different failure modes: (1) cracking of the reaction layers on either side of the interconnections, (2) cracking of the bulk solder, (3) mixed mode of component-side intermetallic and bulk solder cracking, and (4) voidassisted cracking of the component-side Cu₃Sn layer. The assemblies that were not thermally cycled or annealed exhibited only type (1) failure mode. The interconnections that were thermally cycled before the drop test failed by mode (2) or mode (3). The drop test reliability of the thermally cycled interconnections was found to depend on the extent of recrystallization generated during the thermal cycling. This also explains the observed wide dispersion in the number of drops to failure. On the other hand, the test boards that were isothermally annealed before the drop testing failed by mode (4).     

Preparation and evaluation of a new synthetic polymeric chiral stationary phase for HPLC based on the trans-9,10-dihydro-9,10-ethanoanthracene-(11S,12S)-11,12-dicarboxylic acid bis-4-vinylphenylamide monomer

A new synthetic polymeric chiral stationary phase for liquid chromatography was prepared via free-radical-initiated polymerization of trans-9,10-dihydro-9,10-ethanoanthracene-(11S,12S)-11,12-dicarboxylic acid bis-4-vinylphenylamide. The new polymeric chiral stationary phase (CSP) showed enantioselectivity for many chiral compounds in multiple mobile phases. High stability and sample capacities were observed on this polymeric chiral stationary phase. Mobile phase components and additives affected chiral separation greatly. This new synthetic chiral stationary phase is complementary to two other related commercially available CSPs: the P-CAP and P-CAP-DP columns. Interactions between the chiral stationary phase and analytes that lead to retention and chiral recognition include hydrogen bonding, dipolar, and π–π interactions. Repulsive (steric) interactions also contribute to chiral recognition. Figure LC chromatograms showing the analytical (blue) and preparative (red) separations of N-(3,5-dinitrobenzoylleucine) enantiomers on a new synthetic polymeric chiral stationary phase     

晶圆级芯片规模封装——微型表面贴装元器件

概述了美国国家半导体的晶圆级芯片规模封装技术——也就是微型表面贴装元器件(Mi-croSMD)。采用8I/O数、凸点节距为0.5mm封装论证此新型封装技术,该技术满足于低管脚数模拟和无线元器件。较高管脚数(多达48)产品扩展在各种范围的限定条件之内。论述了封装结构、工艺流程及封装可靠性,并阐述了板级组装工艺过程和互连可靠性。     

小型化双通带声表滤波器设计研究

针对小型化双通带声表面波(SAW)滤波器的需求背景,对两端口、两通带的SAW滤波器的设计技术展开研究。通过搭建包含两组耦合模（COM）参数的双通带SAW滤波器声电协同仿真平台,分析优化滤波器性能,成功研制出CSP2520封装的双通带SAW滤波器,其中心频率分别为1 995 MHz和2 185 MHz,通带带宽均为40 MHz,插入损耗小于3 dB,通带间隔离度大于30 dB。测试与仿真结果基本一致。     

嵌入式动态Web网页实现方法探究

根据BOA服务器下实现动态网页的具体情况,分析比较了CGI、CSP、AJAX、自定义标签及标签预处理等四种动态网页的生成方案,得出AJAX是一种性能好且简单的动态网页生成技术,其技术思路很适合应用于嵌入式Web系统中。