一种900-MHz 20-mW CMOS功率放大器的设计

提出了一个工作电压为3V，工作频率900MHZ，输出功率为20mW的高效率CMOS功率放大器。为了达到设计目标，文章采用了一些特殊的方法，包括三级放大结构，级间的调谐匹配和层叠差分结构。     

A Symbolic Pole/Zero Extraction Methodology Based on Analysis of Circuit Time-Constants

This paper introduces a methodology for symbolic pole/zero extraction based on the formulation of the time-constant matrix of the circuits. This methodology incorporates approximation techniques specifically devoted to achieve an optimum trade-off between accuracy and complexity of the symbolic root expressions. The capability to efficiently handle even large circuits will be demonstrated through several practical circuits.     

Luminescence investigations of the GaP-based dilute nitride Ga(NAsP) material system

Multi-quantum well heterostructures (MQWHs) of the novel Ga(NAsP)/GaP material system have been grown, pseudomorphically strained to GaP-substrate. The crystalline perfection is verified by transmission electron microscopy (TEM). For As-concentrations in excess of about 70%, a direct band structure and adequate luminescence efficiency for laser device application is observed. Temperature-dependent photoluminescence (PL) investigations show the influence of carrier localisation and non-radiative recombination processes typical for dilute nitride materials. With rising N content in the active material, the emission wavelength shifts towards longer wavelength, leading to Ga(NAs)/GaP MQW structures with photon energies below the indirect band gap of silicon (Si). At the same time the luminescence intensity drops due to an increase in non-radiative carrier traps and/or structural degradation.     

一种语音混沌保密通信方案的研究与硬件实现

在硬件实验研究的基础上，建立一种环形蔡氏电路，提出用环蔡氏电路实现语音混沌保密通信的一种闭环逆系统方案，其特点是利用环形蔡氏电路的单向耦合原理，通过反馈的方法形成一个包括有用信号在内的极联闭合环路，从而实现改善端与接收端之间混沌系统的严格同步而不受有用信息调制的影响。理论分析与硬件实验结果证明，该方案同现有的其它混沌通信方案相比较，具有非线性失真小、保真度高的优点，完全能够满足传送语音信号的要求。     

用于千兆以太网基带铜缆接收器均衡的甚高频自适应 连续时间Gm-C 二阶带通滤波器的研究和设计

本文设计了用于千兆以太网基带铜缆接收器均衡的甚高频自适应连续时间Gm-C二阶带通滤波器。基于最陡梯度下降算法，带通滤波器的零点在57－340MHz的频率范围内可以自适应地调节，中心频率为1.278GHz。通过外接电阻伺服环路，滤波器中跨导转换器的跨导值不受工艺偏差和温度变化的影响，采用CSMC－HJ0.6μm CMOS工艺器件模型，用Cadence Spectres仿真器仿真了设计的自适应滤波器电路，仿真结果验证了设计原理和设计的电路。系统的最长学习时间为880个参考时钟周期。     

基于Multisim8的压控振荡电路仿真分析

介绍了Multisim8的仿真功能的特点，并通过实例说明了用Multisim8进行仿真分析的具体方法，简单介绍了如何设置参数和进行仿真操作。     

介孔网络电路

用二次阳极氧化法制备纳米多孔氧化铝板,然后用磁控溅射方式在纳米多孔氧化铝板表面镀金得到介孔网络电路,对该介孔网络电路进行输运测量,发现其具有非线性电阻.     

Grouped Approach for the Design of H.264/AVC Motion Estimation Architectures

This letter presents a novel approach for organizing computational resources into groups within H.264/AVC motion estimation architectures, leading to reductions of up to 75% in the equivalent gate count with respect to state‐of‐the‐art designs.     

On removable even circuits in graphs

Let G be a connected graph with minimum degree at least 3. We prove that there exists an even circuit C in G such that G−E(C) is either connected or contains precisely two components one of which is isomorphic to a 1-bond. We further prove sufficient conditions for there to exist an even circuit C in a 2-connected simple graph G such that G−E(C) is 2-connected. As a consequence of this, we obtain sufficient conditions for there to exist an even circuit C in a 2-connected graph G for which G−E(C) is 2-connected.     

0.25μm CMOS千兆以太网发送器设计

分析了千兆以太网体系结构,给出了符合IEEE 802.3z标准中1000BASE-X规范的发送器电路结构,并采用TSMC 0.25 μm CMOS 混合信号工艺设计了符合该规范的高速复接电路和锁相环时钟倍频电路.芯片核心电路面积分别为(0.3×0.26)mm2和(0.22×0.12)mm2.工作电压2.5 V时,芯片核心电路功耗分别为120 mW和100 mW.时钟倍频电路的10倍频输出时钟信号频率为1.25 GHz,其偏离中心频率1MHz处的单边带相位噪声仅为-109.7 dBc/Hz.在驱动50 Ω输出负载的条件下,1.25 Gbit/s的高速输出数据信号摆幅可达到410 mV.