数字全息技术的原理和应用

数字全息是随着现代计算机和CCD技术发展而产生的一种新的全息成像技术．文章主要介绍数字全息技术的基本原理，数字全息重建中的主要方法以及数字全息技术以其独特的优点在各个领域中的应用．     

Vehicle density and velocity estimation on highways for on-ramp metering control

A scheme for vehicle density and velocity estimation in a stretch of highway based on a modified cell transmission model [C. F. Daganzo, Transportation Research, Part B, 28B(4),269–287, 1994. Elsevier is presented. The scheme is intended for use with on-ramp metering control algorithms, providing local knowledge of densities and velocities that is helpful to improve on-ramp metering control performance. Estimation of density is obtained by nonlinear estimators, while velocity estimation is obtained by gradient algorithms. There is one density–velocity estimator for free traffic flow and other for congested traffic flow. Both estimator schemes work in parallel. The final estimation of density and velocity results from a convex combination of the predictions of the two estimators. This combination depends on occupancy or density measurements at the boundaries of the stretch and is produced by a fuzzy inference system. Stability and convergence of the density and velocity estimation scheme is proved by Lyapunov based techniques. Simulation results comparing measured and estimated traffic data are presented. They confirm good performance of the estimators. Research sponsored by grants UNAM PAPIIT IN110403 and CONACYT 47583.     

The VC dimension of k‐uniform random hypergraphs

A set of vertices is shattered in a hypergraph if any of its subsets is obtained as the intersection of an edge with the set. The VC dimension is the size of the largest shattered subset. Under the binomial model of k‐uniform random hypergraphs, the threshold function for the VC dimension to be larger than a given integer is obtained. The same is done for the testing dimension, which is the largest integer d such that all sets of cardinality d are shattered. © 2006 Wiley Periodicals, Inc. Random Struct. Alg., 2007     

A competitive algorithm in searching for many edges in a hypergraph

We give a competitive algorithm to identify all d defective edges in a hypergraph with d unknown. Damaschke did the d=1 case for 2-graphs, Triesch extended the d=1 case to r-graphs, and Johann did the general d case for 2-graphs. So ours is the first attempt to solve the searching for defective edges problem in its full generality. Further, all the above three papers assumed d known. We give a competitive algorithm where d is unknown.     

Practical stopping criteria for validating safety-critical software by estimating impartial reliability

In this research, we investigate stopping rules for software testing and propose two stopping rules from the aspect of software reliability testing based on the impartial reliability model. The impartial reliability difference (IRD-MP) rule considers the difference between the impartial transition-probability reliabilities estimated for both software developer and consumers at their predetermined prior information levels. The empirical–impartial reliability difference (EIRD-MP) rule suggests stopping a software test when the computed empirical transition reliability is tending to its estimated impartial transition reliability. To insure the high-standard requirement for safety-critical software, both rules take the maximum probability (MP) of untested paths into account.     

自由曲面光学虚拟制造与检测系统的探讨

自由曲面光学产品设计、制造与检测的工艺流程，通常采取试凑法逐次逼近。由于加工 检测 再加工，循环往复，既费时，成本又高，产生了瓶颈问题。为了解决此弊端，本文运用虚拟制造技术，提出光学虚拟制造的基本构想，即虚拟制造系统结构模型，给出光学系统虚拟原型的构成和光学系统成像质量虚拟检测系统的构成，讨论光学成像质量的仿真检测以及敏度分析方法。研究结果表明：运用虚拟制造与检测技术，可缩短研发周期，降低成本，优化工艺并提高产品质量。     

A new microtensile tester for the study of MEMS materials with the aid of atomic force microscopy

An apparatus has been designed and implemented to measure the elastic tensile properties (Young's modulus and tensile strength) of surface micromachined polysilicon specimens. The tensile specimens are “dog-bone” shaped ending in a large “paddle” for convenient electrostatic or, in the improved apparatus, ultraviolet (UV) light curable adhesive gripping deposited with electrostatically controlled manipulation. The typical test section of the specimens is 400 μm long with 2 μm×50 μm cross section. The new device supports a nanomechanics method developed in our laboratory to acquire surface topologies of deforming specimens by means of Atomic Force Microscopy (AFM) to determine (fields of) strains via Digital Image Correlation (DIC). With this tool, high strength or non-linearly behaving materials can be tested under different environmental conditions by measuring the strains directly on the surface of the film with nanometer resolution.     

Tests of ordered hypotheses in linkage in heredity

The asymptotic null distribution of the likelihood ratio test for two cases of ordered hypotheses in a particular genetic model is considered. A simple iterative process is proposed in order to get the restricted estimates. It is shown that both tests have asymptotically a chi-bar squared distribution and the same size. A simulation study is also conducted in order to compare the usual unrestricted test with the corresponding one of ordered hypotheses. Finally, the results are extended to some special cases.     

Techniques for estimating test length under random test

When a circuit is tested using random or pseudorandom patterns, it is essential to determine the amount of time (test length) required to test it adequately. We present a methodology for predicting different statistics of random pattern test length. While earlier methods allowed estimation only of upper bounds of test length and only for exhaustive fault coverage, the technique presented here is capable of providing estimates of all statistics of interest (including expected value and variance) for all coverage specifications.Our methodology is based on sampling models developed for fault coverage estimation [1]. Test length is viewed as awaiting time on fault coverage. Based on this relation we derive the distribution of test length as a function of fault coverage. Methods of approximating expected value and variance of test length are presented. Accuracy of these approximations can be controlled by the user. A practical technique for predicting expected test length is developed. This technique is based on clustering faults into equal detectability subsets. A simple and effective algorithm for fault clustering is also presented. The sampling model is applied to each cluster independently and the results are then aggregated to yield test lengths for the whole circuit. Results of experiments with several circuits (both ISCAS '85 benchmarks and other practical circuits) are also provided.This work was done while the author was with the Department of Electrical Engineering, Southern Illinois University, Carbondale, IL 62901.     

Energy minimization and design for testability

The problem of fault detection in general combinational circuits is NP-complete. The only previous result on identifying easily testable circuits is due to Fujiwara who gave a polynomial time algorithm for detecting any single stuck fault inK-bounded circuits. Such circuits may only contain logic blocks with no more thanK input lines and the blocks are so connected that there is no reconvergent fanout among them. We introduce a new class of combinational circuits called the (k, K)-circuits and present a polynomial time algorithm to detect any single or multiple stuck fault in such circuits. We represent the circuit as an undirected graphG with a vertex for each gate and an edge between a pair of vertices whenever the corresponding gates have a connection. For a (k, K)-circuit,G is a subgraph of ak-tree, which, by definition, cannot have a clique of size greater thank+1. Basically, this is a restriction on gate interconnections rather than on the function of gates comprising the circuit. The (k, K)-circuits are a generalization of Fujiwara'sK-bounded circuits. Using the bidirectional neural network model of the circuit and the energy function minimization formulation of the fault detection problem, we present a test generation algorithm for single and multiple faults in (k, K)-circuits. This polynomial time aggorithm minimizes the energy function by recursively eliminating the variables.