传感器网络中基于二元簇的节能路由算法

传感器网络中的分簇算法已经被证明能够有效地节约能量。据此提出了一种基于二元簇的路由算法,其基本思想是网络中的每个节点同时属于2个不同簇,利用二元性来减少在路由发现中的资源浪费,并能够更加确定地发现路由以节约资源。理论分析和模拟实验都表明,该算法在能量消耗和网络生命周期延长方面较优。     

A Bluetooth Routing Protocol Using Evolving Fuzzy Neural Networks

In this paper, a routing protocol which utilizes the characteristics of Bluetooth technology is proposed for Bluetooth-based mobile ad hoc networks. The routing tables are maintained in the master devices and the routing zone radius for each table is adjusted dynamically by using evolving fuzzy neural networks. Observing there exists some useless routing packets which are helpless to build the routing path and increase the network loads in the existing ad hoc routing protocols, we selectively use multiple unicasts or one broadcast when the destination device is out of the routing zone radius coverage of the routing table. The simulation results show that the dynamic adjustment of the routing table size in each master device results in much less reply time of routing request, fewer request packets and useless packets compared with two representative protocols, Zone Routing Protocol and Dynamic Source Routing.     

无线网状网技术与应用

无线网状网(WMNs)由网状路由器节点和客户机节点组成,其中的网状路由器节点组成了无线网状网的网络骨干,其移动性很小。他们一起为无线网状网和其他常规无线网络的客户机节点提供网络的无线接入。WMNs技术结合了中心式控制的蜂窝网与分布式控制的无线自组织网的优点,可有效克服这两种技术的缺陷并显著提高无线网络的性能,已经成为下一代无线通信网络的研究热点之一。WMNs可为无线个域网、局域网、校园网、城域网的一系列应用提供高速无线宽带接入服务。虽然目前WMNs技术发展很快,但其协议栈各层仍存在许多有待研究的课题。首先简要介绍了无线网状网的结构与特点;随后重点分析了其主要的几个应用领域;最后探讨了WMNs各协议层的研究现状与关键技术,并分析了该技术存在的问题及未来的研究方向。     

The Role of Network Topologies in the Optical Core of IP-over-WDM Networks with Static Wavelength Routing

In this paper, we present a performance analysis of network topologies for the optical core of IP-over-WDM networks with static wavelength routing. The performance analysis is focused on regular degree four topologies, and, for comparison purposes, degree three topologies are also considered. It is shown that the increase of the nodal degree from three (degree three topology with smallest diameter) to four (degree four topology with smallest diameter) improves the network performance if a larger number of wavelengths per link is available. However, the influence of wavelength interchange on the nodal degree gain is small. The performance of regular degree four topologies with smallest diameter is also compared with the performance of mesh–torus topologies (which are also degree four topologies), and it is shown that the blocking probability of degree four topologies with smallest diameter is about two orders of magnitude lower than the blocking probability of mesh–torus topologies. It is also presented a performance comparison of WDM-based networks with nodal degrees ranging from two to five and it is shown that the increase of the nodal degree from two to three leads to high nodal degree gains, while de increase of the nodal degree from four to five leads to low nodal degree gains. These results show that degree three and degree four topologies are very attractive for use in the optical core of IP-over-WDM networks.     

弹性分组环技术

弹性分组环技术是一种新兴的城域网技术。作者主要讨论了弹性分组环技术的特点和优势,并且简要介绍了弹性分组环技术目前在国内城域网建设中的一些应用。弹性分组环技术集以太网的经济性、IP的智能化、光纤环网的丰富带宽和可靠性于一体,是目前宽带IP城域网运营商的最佳组网方案。     

Nanoweb Formation: 2D Self‐Assembly of Semiconductor Gallium Oxide Nanowires/Nanotubes

This paper reports a method to produce networks of crystalline gallium oxide comprised of one‐dimensional (1D) nanostructures. Because of the unique arrangement of wires, these crystalline networks are termed as ‘nanowebs’. Nanowebs are of great technological interest since they contain wire densities of the order of 10⁹ cm^–2. A possible mechanism for the fast self‐assembly of crystalline metal oxide nanowires involves multiple nucleation and coalescence via oxidation–reduction reactions at the molecular level. The preferential growth of nanowires parallel to the substrate enabled them to coalesce into regular polygonal networks. The individual segments of the polygonal network consist of both nanowires and nanotubules of β‐gallium oxide. Individual wire properties contribute to a nanoweb’s overall capacity and the implications for devices based on nanowebs are expected to be enormous.     

Positively Thermo‐Sensitive Monodisperse Core–Shell Microspheres

In this paper, we report on a novel family of monodisperse thermo‐sensitive core–shell hydrogel microspheres that is featured with high monodispersity and positively thermo‐responsive volume phase transition characteristics with tunable swelling kinetics, i.e., the particle swelling is induced by an increase rather than a decrease in temperature. The microspheres were fabricated in a three‐step process. In the first step, monodisperse poly(acrylamide‐co‐styrene) seeds were prepared by emulsifier‐free emulsion polymerization. In the second step, poly(acrylamide) or poly[acrylamide‐co‐(butyl methacrylate)] shells were fabricated on the microsphere seeds by free radical polymerization. In the third step, the core–shell microspheres with poly‐ (acrylamide)/poly(acrylic acid) based interpenetrating polymer network (IPN) shells were finished by a method of sequential IPN synthesis. The proposed monodisperse core–shell microspheres provide a new mode of the phase transition behavior for thermo‐sensitive “smart” or “intelligent” monodisperse micro‐actuators that is highly attractive for targeting drug delivery systems, chemical separations, sensors, and so on.     

Survey of switching techniques in high-speed networks and their performance

One of the most promising approaches for high speed networks for integrated service applications is fast packet switching, or ATM (asynchronous transfer mode). ATM can be characterized by very high speed transmission links and simple, hard-wired protocols within a network. To match the transmission speed of the network links, and to minimize the overhead due to the processing of network protocols, the switching of cells is done in hardware switching fabrics in ATM networks. A number of designs have been proposed for implementing ATM switches. Although many differences exist among the proposals, the vast majority of them are based on self-routeing multistage interconnection networks. This is because of the desirable features of multi-stage interconnection networks such as self-routeing capability and suitability for VLSI implementation. Existing ATM switch architectures can be classified into two major classes: blocking switches, where blockings of cells may occur within a switch when more than one cell contends for the same internal link, and non-blocking switches, where no internal blocking occurs. A large number of techniques have also been proposed to improve the performance of blocking and non-blocking switches. In this paper, we present an extensive survey of the existing proposals for ATM switch architectures, focusing on their performance issues.     

Delay-dependent stochastic stability of delayed Hopfield neural networks with Markovian jump parameters

In this paper, the problem of stochastic stability for a class of time-delay Hopfield neural networks with Markovian jump parameters is investigated. The jumping parameters are modeled as a continuous-time, discrete-state Markov process. Without assuming the boundedness, monotonicity and differentiability of the activation functions, some results for delay-dependent stochastic stability criteria for the Markovian jumping Hopfield neural networks (MJDHNNs) with time-delay are developed. We establish that the sufficient conditions can be essentially solved in terms of linear matrix inequalities.     

A high-capacity broadband packet switch architecture based on a multilink approach

Broadband packet networks based on asynchronous transfer mode (ATM) are expected to provide a wide range of services, including motion video, voice, data and image. When these networks become prevalent, some applications such as motion video and high-speed LAN interconnections will place a very large bit rate requirement on the channels. Currently, the physical layer supported by the synchronous optical network (SONET) allows the transmission of up to 2.4 Gbit/s with the OC-48 optical interface. However, it is not feasible for the electronic packet switch to route packets at this rate on a single link. In this paper we present a design of a broadband packet switch that uses multiple links in parallel to realize a high-speed channel. This implementation permits the switch to operate at the lower link rate, which can be at 150 Mbit/s, while having the ability to support a virtual circuit at a higher rate (up to 2.4 Gbit/s). The main contribution of the design is that packet sequence on a channel is still maintained even though packets are allowed to use any of the links belonging to the same channel. Besides allowing the switch to function at a slower rate than the transmission channel rate, the implementation of the multilinks benefits from statistical multiplexing gain. Analytical results show the performance advantages of multilink design with respect to delay, throughput and packet loss probability.