THE effect of Srandom DOPANT fluctuation on threshold voltage and drain current variation in junctionless nanotransistors

We investigate the effect of dopant random fluctuation on threshold voltage and drain current variation in a two-gate nanoscale transistor. We used a quantum-corrected technology computer aided design simulation to run the simulation (10000 randomizations). With this simulation, we could study the effects of varying the dimensions (length and width), and thicknesses of oxide and dopant factors of a transistor on the threshold voltage and drain current in subthreshold region (off) and overthreshold (on). It was found that in the subthreshold region the variability of the drain current and threshold voltage is relatively fixed while in the overthreshold region the variability of the threshold voltage and drain current decreases remarkably, despite the slight reduction of gate voltage diffusion (compared with that of the subthreshold). These results have been interpreted by using previously reported models for threshold current variability, load displacement, and simple analytical calculations. Scaling analysis shows that the variability of the characteristics of this semiconductor increases as the effects of the short channel increases. Therefore, with a slight increase of length and a reduction of width, oxide thickness, and dopant factor, we could correct the effect of the short channel.     

Microwave‐assisted polycondensation of 4‐octylaniline with dibromoarylene

The Pd‐catalyzed polycondensation of 4‐octylaniline with various dibromoarylenes was carried out under microwave heating. Microwave heating led to a decrease in the reaction time and an increase in the molecular weight of the polymers as compared to conventional heating. Microwave heating also allowed the catalyst loading to be reduced to 1 mol %, yielding polymerization results that were comparable to those under conventional heating and 5 mol % catalyst. Investigations regarding field‐effect transistors and organic photovoltaic cells using the obtained poly(arylamine) with azobenzene units revealed that increasing the molecular weight of the polymer led to improved device performance, including hole mobility and power conversion efficiency. © 2014 Wiley Periodicals, Inc. J. Polym. Sci., Part A: Polym. Chem. 2015 , 53, 536–542     

High-voltage and low specific on-resistance power UMOSFET using P and N type columns

For the first time, we present the unique features exhibited by power 4H–SiC UMOSFET in which N and P type columns (NPC) in the drift region are incorporated to improve the breakdown voltage, the specific on-resistance, and the total lateral cell pitch. The P-type column creates a potential barrier in the drift region of the proposed structure for increasing the breakdown voltage and the N-type column reduces the specific on-resistance. Also, the JFET effects reduce and so the total lateral cell pitch will decrease. In the NPC-UMOSFET, the electric field crowding reduces due to the created potential barrier by the NPC regions and causes more uniform electric field distribution in the structure. Using two dimensional simulations, the breakdown voltage and the specific on-resistance of the proposed structure are investigated for the columns parameters in comparison with a conventional UMOSFET (C-UMOSFET) and an accumulation layer UMOSFET (AL-UMOSFET) structures. For the NPC-UMOSFET with 10 µm drift region length the maximum breakdown voltage of 1274 V is obtained, while at the same drift region length, the maximum breakdown voltages of the C-UMOSFET and the AL-UMOSFET structures are 534 and 703 V, respectively. Moreover, the proposed structure exhibits a superior specific on-resistance (R_on,sp) of 2 mΩ cm², which shows that the on-resistance of the optimized NPC-UMOSFET are decreased by 56% and 58% in comparison with the C-UMOSFET and the AL-UMOSFET, respectively.     

Using d-limonene as the non-aromatic and non-chlorinated solvent for the fabrications of high performance polymer light-emitting diodes and field-effect transistors

Aiming to environment protection, green solvents are crucial for commercialization of solution-processed optoelectronic devices. In this work, d-limonene, a natural product, was introduced as the non-aromatic and non-chlorinated solvent for processing of polymer light-emitting diodes (PLEDs) and organic field effect transistors (OFETs). It was found that d-limonene could be a good solvent for a blue-emitting polyfluorene-based random copolymer for PLEDs and an alternating copolymer FBT-Th₄(1,4) with high hole mobility (μ_h) for OFETs. In comparisons to routine solvent-casted films of the two conjugated polymers, the resulting d-limonene-deposited films could show comparable film qualities, based on UV–vis absorption spectra and observations by atomic force microscopy (AFM). With d-limonene as the processing solvent, efficient blue PLEDs with CIE coordinates of (0.16, 0.16), maximum external quantum efficiency of 3.57%, and luminous efficiency of 3.66 cd/A, and OFETs with outstanding μ_h of 1.06 cm² (V s)⁻¹ were demonstrated. Our results suggest that d-limonene would be a promising non-aromatic and non-chlorinated solvent for solution processing of conjugated polymers and molecules for optoelectronic device applications.     

贝克曼AllegraTM21R型超高速离心机故障排除一例

贝克曼Allegra^TM 21R型超高速离心机开机后，操作面板上出现错误代码“28”，离心机不旋转。离心机的电机采用无刷感应驱动，由电机驱动电源模块BSMl0GD60DN2驱动离心机的电机。故障是由于电源模块BSMl0GD60DN2损坏引起的。采用东芝三相桥式IGBT电源模块MG25Q6ES42代替BSMl0GD60DN2，并更换已烧毁的栅极电阻后。开机试验，仪器恢复正常。     

STI process steps for sub-quarter micron CMOS

This paper presents Shallow Trench Isolation (STI) process steps for sub-1/4 μ CMOS technologies. Dummy active areas, vertical trench sidewalls, excellent gap filling, counter mask etch step and CMP end point detection, have been used for a 0.18 μm CMOS technology. Electrical results obtained with a 5.5 nm gate oxide thickness show good isolation down to 0.3 μm spacing. Good transistor performances have been demonstrated.     

CMOS电路中抗Latch-up的保护环结构研究

闩锁是CMOS集成电路中的一种寄生效应,这种PNPN结构一旦被触发,从电源到地会产生大电流,导致整个芯片的失效。针对芯片在实际测试中发现的闩锁问题,介绍了闩锁的测试方法,并且利用软件Tsuprem4和Medici模拟整个失效过程,在对2类保护环(多子环/少子环)作用的分析,以及各种保护结构的模拟基础之上,通过对比触发电压和电流,得到一种最优的抗Latch up版图设计方法,通过进一步的流片、测试,解决了芯片中的闩锁失效问题,验证了这种结构的有效性。     

一种基于能带工程设计的CaAsSb/InP异质结双极晶体三极管

异质结晶体三极管（HBT）的性能与其材料体系密不可分，利用能带工程可以大大优化器件的结构，提高器件性能，文章从分析HBT的能带结构及设计要求入手，介绍了一种利用能带工程设计的基于GaAsSb/InP材料体系的新型HBT器件的结构及其性能，分析了该器件与其它材料体系器件相比所具有的优异特性，说明了对HBT的各区材料，其带边的相对位置所起的重要作用，最后，文章还报道了近期的实验情况，说明了GaAsSb/InP体系HBT的实际性能与理论预言一致。     

L波段窄脉宽500W固态功放组件的设计

介绍了作者研制的应用于固态雷达发射机上的L波段500W固态功放组件的工作原理、用途及其主要技术指标。描述了功放组件的设计过程和测试结果。该功放组件在窄脉宽条件下实现了快速上升沿,性能优良,工作稳定可靠。     

Thermal stability of interfaces between metals and InP-based materials

The thermal stability of interfaces between metals (Ni, Pt, Ti, Mo) and III-V compound semiconductors has been investigated by the application of Rutherford backscattering spectrometry. Metal diffusion and interfacial lattice disorder of the semiconductors were analyzed for various metal/semiconductor samples annealed at temperatures up to 500°C. The interfaces of Ni/GaAs and Ti/GaAs were found to be more stable than those of Ni/In-based semiconductors and Ti/ In-based semiconductors, respectively. Faster diffusion of Pt atoms was ob-served in In-and As-containing materials than in P-containing materials. Mo/ semiconductor interfaces were the most stable.