单轴应变硅nMOSFET栅隧穿电流模型

本文基于量子机制建立了单轴应变硅nMOSFET栅隧穿电流模型,分析了隧穿电流与器件结构参数、偏置电压及应力的关系.仿真分析结果与单轴应变硅nMOSFET的实验结果符合较好,表明该模型可行.同时与具有相同条件的双轴应变硅nMOSFET的实验结果相比,隧穿电流更小,从而表明单轴应变硅器件更具有优势.该模型物理机理明确,不仅适用于单轴应变硅nMOSFET,只要将相关的参数置换,该模型也同样适用于单轴应变硅pMOSFETs. 关键词： 单轴应变 nMOSFET 栅隧穿电流 模型     

小尺寸应变Si金属氧化物半导体场效应晶体管栅隧穿电流预测模型

小尺寸金属氧化物半导体场效应晶体管(MOSFET)器件由于具有超薄的氧化层、关态栅隧穿漏电流的存在严重地影响了器件的性能,应变硅MOSFET器件也存在同样的问题.为了说明漏电流对新型应变硅器件性能的影响,文中利用积分方法从准二维表面势分析开始,提出了小尺寸应变硅MOSFET栅隧穿电流的理论预测模型,并在此基础上使用二维器件仿真软件ISE进行了仔细的比对研究,定量分析了在不同栅压、栅氧化层厚度下MOSFET器件的性能.仿真结果很好地与理论分析相符合,为超大规模集成电路的设计提供了有价值的参考. 关键词： 应变硅 准二维表面势 栅隧穿电流 预测模型     

252Cf源和重离子加速器对FPGA的单粒子效应

 对10万门基于静态随机存储器的现场可编程门阵列（FPGA）分别在锎-252（²⁵²Cf）源和HI-13串列加速器下进行了单粒子效应试验研究,测试了静态单粒子翻转截面及发生单粒子闩锁的线性能量转移阈值,并对试验结果进行了等效性分析比较。试验结果表明²⁵²Cf源引起的FPGA单粒子翻转截面比重离子加速器引起的约低1个数量级;使用²⁵²Cf源未能观测到该器件的单粒子闩锁现象,而使用重离子加速器可以测出该FPGA发生单粒子闩锁的线性能量转移阈值;在现代集成电路的宇航辐射效应地面模拟单粒子效应试验中²⁵²Cf源不是理想的测试单粒子闩锁的辐射源。     

Implementation of a nonlocal N-qubit conditional phase gate using the nitrogen–vacancy center and microtoroidal resonator coupled systems

Implementation of a nonlocal multi-qubit conditional phase gate is an essential requirement in some quantum infor- mation processing （QIP） tasks. Recently, a novel solid-state cavity quantum electrodynamics （QED） system, in which the nitrogen-vacancy （NV） center in diamond is coupled to a microtoroidal resonator （MTR）, has been proposed as a poten- tial system for hybrid quantum information and computing. By virtue of such systems, we present a scheme to realize a nonlocal N-qubit conditional phase gate directly. Our scheme employs a cavity input-output process and single-photon interference, without the use of any auxiliary entanglement pair or classical communication. Considering the currently available technologies, our scheme might be quite useful among different nodes in quantum networks for large-scaled QIP.     

100-nm T-gate InAIAs/InGaAs InP-based HEMTs with fT= 249 GHz and fmax ： 415 GHz

InA1As/InGaAs high electron mobility transistors （HEMTs） on an InP substrate with well-balanced cutoff frequency fT and maximum oscillation frequency frnax are reported. An InA1As/InGaAs HEMT with 100-nm gate length and gate width of 2 × 50 μm shows excellent DC characteristics, including full channel current of 724 mA/mm, extrinsic maximum transconductance gm.max of 1051 mS/mm, and drain-gate breakdown voltage BVDG of 5.92 V. In addition, this device exhibits fT = 249 GHz and fmax = 415 GHz. These results were obtained by fabricating an asymmetrically recessed gate and minimizing the parasitic resistances. The specific Ohmic contact resistance was reduced to 0.031 0.mm. Moreover, the fT obtained in this work is the highest ever reported in 100-nm gate length InA1As/InGaAs InP-based HEMTs. The outstanding gm.max, fT, fmax, and good BVDG make the device suitable for applications in low noise amplifiers, power amplifiers, and high speed circuits.     

Reliability analysis of non‐repairable systems modeled by dynamic fault trees with priority AND gates

Many real‐life systems are typically involved in sequence‐dependent failure behaviors. Such systems can be modeled by dynamic fault trees (DFTs) with priority AND gates, in which the occurrence of the top events depends on not only combinations of basic events but also their failure sequences. To the author's knowledge, the existing methods for reliability assessment of DFTs with priority AND gates are mainly Markov‐state‐space‐based, inclusion–exclusion‐based, Monte Carlo simulation‐based, or sequential binary decision diagram‐based approaches. Unfortunately, all these methods have their shortcomings. They either suffer the problem of state space explosion or are restricted to exponential components time‐to‐failure distributions or need a long computation time to obtain a solution with a high accuracy. In this article, a novel method based on dynamic binary decision tree (DBDT) is first proposed. To build the DBDT model of a given DFT, we present an adapted format of the traditional Shannon's decomposition theorem. Considering that the chosen variable index has a great effect on the final scale of disjoint calculable cut sequences generated from a built DBDT, which to some extent determines the computational efficiency of the proposed method, some heuristic branching rules are presented. To validate our proposed method, a case study is analyzed. The results indicate that the proposed method is reasonable and efficient. Copyright © 2015 John Wiley & Sons, Ltd.     

The matter‐antimatter interpretation of Kerr spacetime

Repulsive gravity is not very popular in physics. However, one comes across it in at least two main occurrences in general relativity: in the negative‐r region of Kerr spacetime, and as the result of the gravitational interaction between matter and antimatter, when the latter is assumed to be CPT‐transformed matter. Here we show how these two independent developments of general relativity are perfectly consistent in predicting gravitational repulsion and how the above Kerr negative‐r region can be interpreted as the habitat of antimatter. As a consequence, matter particles traveling along vortical geodesics can pass through the throat of a rotating black hole and emerge as antimatter particles (and vice versa). An experimental definitive answer on the gravitational behavior of antimatter is awaited in the next few years.

     

电子电路创新型实验的开发研究

根据电子技术专业中模拟、数字等专业课实验的教学特点,进行创新性实验的设计训练,结合大学生创新性实验项目的申报、大学生挑战杯项目的参与和学生毕业设计的实践,提供给学生创新实验训练平台,使学生认真地掌握电子电路的理论知识和实践技能,实现了研究性教学和创新实验开发的的教学模式。     

基于SOPC和FPGA的星敏感器检测算法设计与实现

星点检测用于星图中星点质心坐标的提取,是星敏感器处理算法的重要组成部分。星点检测的准确度、精度以及处理速度对星敏感器整机性能具有重要影响。目前,成熟的星点检测方案是采用DSP+FPGA进行图像处理,通过高斯曲面拟合、平方质心法等方法提取质心坐标。提出了一种基于SOPC技术和FPGA图像处理实现星点检测的可行方案,详细介绍了关键算法设计及实现细节。在减小电路尺寸的同时,该方案极大提升了处理速度,实际应用中1 024×1024分辨率星图可达到14Hz帧率,这对于提高星敏感器实时性、丰富星点检测的实现方法具有重要意义。