高电荷态离子引起的富勒烯离子的碎裂

离子在与富勒烯的相互作用过程中会导致C60分子的激发。处于低激发态的C60r 离子通过发射中性C2分子或带电的轻团簇碎片Cn 等非对称碎裂方式来耗散激发能,但如果激发能很高,笼形的C60r 离子可能会彻底崩溃,而发生多重碎裂。C60r 离子的碎裂过程与其电荷态r及分裂势垒密切相关。低电荷态的C60r (r≤3)离子蒸发一个C2分子需要克服10.3 eV左右的势垒。随着电荷态的升高,发射带电的Cn 会变得越来越容易,并逐渐过渡到多重碎裂过程。另一方面,C60r 离子的碎裂机制还与激发方式有关,在直接正碰过程中,将C60分子当作固体薄靶来处理,通过分析不同价态的C60r 离子的碎片谱,发现母核的初始电荷态决定碎裂方式,由此获得一个可以表征激发能大小的可观测量——发射电子个数。     

乙烷内旋转势垒的从头计算以其能量分解

用ab initio方法以6-31G*为基组对乙烷分子内旋转势垒进行了计算; 用exp-6-1方法对势垒进行了分解。所得势垒与文献报导相符得很好。势垒由总排斥能及色散吸引能两大部分组成, 后者的贡献不重要,其绝对值仅约占3%(图2.4), 这与绝大多数文献报导一致。在总排斥能中,重叠交换、电荷转移、及静电三种相互作用的贡献依次各约占12%、36%及52%(图24)。可见静电排斥在内旋转势垒的形成中占主导作用, 这结论与唐敖庆的分析一致, 而与R.M.Pitzer及Morokuma-Umeyama等的结论不完全一致。结果还表明, 不仅总的势能函数, 而且与组成势垒的各成分相应的势能函数都与Kemp及K.S.Pitzer给出的势函数表达式相符得很好(图3)。     

AlGaAs:Sn中DX中心电子俘获势垒的精细结构

采用定电容电压法,测量了n型Al0.26Ga0.74As:Sn中DX中心电子热俘获瞬态,以及不同俘获时间后的电子热发射瞬态;并对瞬态数据进行数值Laplace变换,得到其Laplace缺陷谱（LDS）。通过分析LDS谱,确定了电子热俘获和热发射LDS谱之间的对应关系,从而得到热俘获系数对温度依赖关系,以及与Sn相关的DX中心部分电子热俘获势垒的精细结构;通过第一原理赝势法计算表明,Sn附近的Al/Ga原子的不同配置是电子热俘获势垒精细结构产生的主要原因。     

ω-2ω双色场相位控制电离:隧穿电离与过势垒电离的比较

对于在ω-2ω双色场作用下的原子,在两种不同电离机制下探讨了电离过程的相位效应。结果发现在隧穿机制下总电离率随相对位变化呈“∩”形,而在过势垒机制下呈“∪”形。研究说明利用双色场对原子电离过程进行相位控制是可行的。     

InAs量子点在肖特基势垒二极管输运特性中的影响

在77到292K的范围内,系统研究了含InAs自组装量子点的金属-半导体-金属双肖特基势垒二极管的输运特性.随着温度上升,量子点的存储效应引起的电流回路逐渐减小.在测试温度范围内,通过量子点的共振隧穿过程在电流电压(I-V)曲线中造成台阶结构,且使电流回路随温度的上升急剧减小.根据肖特基势垒的反向I-V曲线,计算了势垒的反向饱和电流密度和平均理想因子.发现共振随穿效应使肖特基势垒在更大的程度上偏离了理想情况,而量子点的电子存储效应主要改变了肖特基势垒的有效势垒高度,从而影响了势垒的反向饱和电流密度 关键词： 自组装量子点 肖特基势垒 电流-电压特性     

半导体器件蒙特卡罗模拟中保持电荷守恒的统计增强方法

介绍了一种在半导体器件蒙特卡罗模拟中保持电荷守恒的统计增强方法,该方法消除了由统计增强引入的电荷统计涨落,保持了不同增强区界面处过界粒子流的连续性.以肖特基势垒二极管为例,应用该方法,实现了高接触势垒情形下的正反向电流模拟.     

Schottky barrier MOSFET structure with silicide source/drain on buried metal

In this paper, we propose a novel Schottky barrier MOSFET structure, in which the silicide source/drain is designed on the buried metal (SSDOM). The source/drain region consists of two layers of silicide materials. Two Schottky barriers are formed between the silicide layers and the silicon channel. In the device design, the top barrier is lower and the bottom is higher. The lower top contact barrier is to provide higher {on-state} current, and the higher bottom contact barrier to reduce the off-state current. To achieve this, ErSi is proposed for the top silicide and CoSi₂ for the bottom in the n-channel case. The 50~nm n-channel SSDOM is thus simulated to analyse the performance of the SSDOM device. In the simulations, the top contact barrier is 0.2e~V (for ErSi) and the bottom barrier is 0.6eV (for CoSi₂. Compared with the corresponding conventional Schottky barrier MOSFET structures (CSB), the high on-state current of the SSDOM is maintained, and the off-state current is efficiently reduced. Thus, the high drive ability (1.2mA/μm at V_ds=1V, V_gs=2V) and the high I_on/I_min ratio (10⁶) are both achieved by applying the SSDOM structure.     

Numerical studies of atmospheric pressure glow discharge controlled by a dielectric barrier between two coaxial electrodes

The glow discharge in pure helium at atmospheric pressure, controlled by a dielectric barrier between coaxial electrodes, is investigated based on a one-dimensional self-consistent fluid model. By solving the continuity equations for electrons, ions, and excited atoms, with the current conservation equation and the electric field profile, the time evolution of the discharge current, gas voltage and the surface density of charged particles on the dielectric barrier are calculated. The simulation results show that the peak values of the discharge current, gas voltage and electric field in the first half period are asymmetric to the second half. When the current reaches its positive or negative maximum, the electric field profile, and the electron and ion densities represent similar properties to the typical glow discharge at low pressures. Obviously there exist a cathode fall, a negative glow region, and a positive column. Effects of the barrier position in between the two coaxial electrodes and the discharge gap width on discharge current characteristics are also analysed. The result indicates that, in the case when the dielectric covering the outer electrode only, the gas is punctured earlier during the former half period and later during the latter half period than other cases, also the current peak value is higher, and the difference of pulse width between the two half periods is more obvious. On reducing the gap width, the multiple current pulse discharge happens.     

High-temperature current conduction through three kinds of Schottky diodes

Fundamentals of the Schottky contacts and the high-temperature current conduction through three kinds of Schottky diodes are studied. N-Si Schottky diodes, GaN Schottky diodes and AlGaN/GaN Schottky diodes are investigated by I--V--T measurements ranging from 300 to 523~K. For these Schottky diodes, a rise in temperature is accompanied with an increase in barrier height and a reduction in ideality factor. Mechanisms are suggested, including thermionic emission, field emission, trap-assisted tunnelling and so on. The most remarkable finding in the present paper is that these three kinds of Schottky diodes are revealed to have different behaviours of high-temperature reverse currents. For the n-Si Schottky diode, a rise in temperature is accompanied by an increase in reverse current. The reverse current of the GaN Schottky diode decreases first and then increases with rising temperature. The AlGaN/GaN Schottky diode has a trend opposite to that of the GaN Schottky diode, and the dominant mechanisms are the effects of the piezoelectric polarization field and variation of two-dimensional electron gas charge density.     

Reverse blocking enhancement of drain field plate in Schottky-drain AlGaN/GaN high-electron mobility transistors

In this paper, we present the combination of drain field plate(FP) and Schottky drain to improve the reverse blocking capability, and investigate the reverse blocking enhancement of drain FP in Schottky-drain AlGaN/GaN high-electron mobility transistors(HEMTs). Drain FP and gate FP were employed in a two-dimensional simulation to improve the reverse blocking voltage(VRB) and the forward blocking voltage(VFB). The drain-FP length, the gate-FP length and the passivation layer thickness were optimized. VRBand VFBwere improved from-67 V and 134 V to-653 V and 868 V respectively after optimization. Simulation results suggest that the combination of drain FP and Schottky drain can enhance the reverse blocking capability significantly.