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11.
Tensile testing of polysilicon   总被引:10,自引:0,他引:10  
Tensile specimens of polysilicon are deposited on a silicon wafer; one end remains affixed to the wafer and the other end has a relatively large paddle that can be gripped by an electrostatic probe. The overall length of the specimen is less than 2 mm, but the smooth tensile portion can be as small as 1.5×2m in cross section and 50m long. The specimen is pulled by a computer-controlled translation stage. Force is recorded with a 100-g load cell, whereas displacement is recorded with a capacitance-based transducer. Strain can be measured directly on wider specimens with laser-based interferometry from two small gold markers deposited on the smooth portion of the specimen. The strength of this linear and brittle material is measured with relative ease. Young's modulus measurement is more difficult; it can be determined from either the stress-strain curve, the record of force versus displacement or the comparison of the records of two specimens of different sizes. Specimens of different sizes—thicknesses of 1.5 or 3.5 m, widths from 2 to 50 m and lengths from 50 to 500 m—were tested. The average tensile strength of this polysilicon is 1.45±0.19 GPa (210 ±28 ksi) for the 27 specimens that could be broken with electrostatic gripping. The average Young's modulus from force displacement records of 43 specimens is 162±14 GPa (23.5 ±2.0×103 ksi). This single value is misleading because the modulus values tend to increase with decreasing specimen width; that is not the case for the strength. The three methods for determining the modulus agree in general, although the scatter can be large.  相似文献   
12.
I. INTRODUCTION Microelectromechanical systems (MEMS) have achieved impressive progress and become a very area of research. But long-term durability of various MEMS devices requires a fundamental understaof the fatigue and fracture characteristics of su…  相似文献   
13.
The effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications are studied. Under a fixed square number, the peak current density (Jpeak) is increased with decreasing the polysilicon resistor width W. The time-to-fail value of the polysilicon resistor is decreased with increasing the electrical and temperature stress. A simple empirical formula is proposed in this study to predict the maximum current density (J ) and lifetime of polysilicon resistors. Under a fixed current density (1.0 × 106A cm − 2), the activation energies (Ea) for n + andp + polysilicon resistors at different temperatures are 0.67 and 0.48 eV, respectively. In addition, at a fixed temperature of 473 K, the current factors for n + andp + polysilicon resistors are 1.57 × 10 − 5and 1.30 × 10 − 5cm2 / A, respectively, under different current densities. Therefore, these precise reliability performances offer promise for ULSI design and fabrication.  相似文献   
14.
The effects of base pressure, etch pressure, gas flow rates of HCl, Cl2, and argon, hexode temperature, DC self-bias, initial polysilicon thickness, and percent of overetch on the etch performance of polysilicon are examined. Statistical design of the experiments provided linear and quadratic models of the etch performance in terms of the aforementioned variables. These models were used to determine the relative importance of each process variable on the etch performance. Optical emission data were utilized as a means of endpoint detection and as a monitor of etch activity. The results indicate that the etch performance is more responsive to variations in physical mechanisms as opposed to chemical processes within the variable ranges used in these experiments.  相似文献   
15.
王健  揣荣岩 《物理学报》2017,66(24):247201-247201
多晶硅薄膜具有良好的压阻特性,晶粒结构和掺杂浓度决定其压阻特性.一般通过调节掺杂浓度改变压阻参数,但现有的多晶硅薄膜压阻系数与掺杂浓度的理论关系和适用范围不够全面.为了完善多晶硅薄膜压阻理论,基于多晶硅纳米薄膜隧道压阻模型,以及硅价带和空穴电导质量随应力改变的机理,提出了一种p型多晶硅薄膜压阻系数算法.该算法分别求取了晶粒中性区和复合晶界区的压阻系数π_(11),π_(12)和π_(44)的理论公式,据此可以计算任意择优晶向排列多晶硅的纵向和横向压阻系数.根据材料的结构特性,求取了p型多晶硅纳米薄膜和普通多晶硅薄膜应变因子,绘制了应变因子与掺杂浓度的关系曲线,与测试结果比较,具有较好的一致性.因此,该算法全面和准确,对多晶硅薄膜的压阻特性的改进和应用具有重要意义.  相似文献   
16.
等离子体还原SiCl4一步法制备多晶硅实验研究   总被引:1,自引:0,他引:1  
区别于改良西门子法、硅烷法、碳热还原法、区域熔炼法等多晶硅生产工艺,利用等离子体技术,建立了以硅的氯化物为原料,一步法制备多晶硅的实验装置和工艺流程,并在此基础上进行了粒状多晶硅制备的实验.实验表明,SiCl4单程转化率超过70;,多晶硅选择性60;.利用XRD、SEM、AS等分析手段,对所得产物进行了表征.与纯度为7个9的多晶硅标样的比较表明,实验产物达到了太阳能级.此方法为多晶硅生产极大地放宽了原料选择条件,为低成本生产太阳能级多晶硅提供了一种新的途径.  相似文献   
17.
考虑包括热辐射在内的质量传递、动量传递、热量传递三维模型,利用流体力学计算软件,对18对棒西门子多晶硅CVD还原炉实际情况进行数值模拟.考察了两种进气方式下还原炉内的流场和温度场分布.计算结果表明,为了实现硅棒均匀沉积,与底盘上分散进气、中心集中出气的还原炉结构相比,中心集中进气、中环与外环之间分散出气的流场及温度场分布更为合理.后者可能有效避免气体在进出口间的“短路”现象,又使炉内各处温度分布更为均匀,减小硅棒不均匀生长现象.模拟结果还表明,采用典型工况的数据,还原炉中总能量损失占能量输入的78.9;,辐射热损失占总能量损失的70.9;,产品单位质量能耗为72.8 kWh/·kg-1,与很多其他研究结果及实际相一致.  相似文献   
18.
建立了氢气和三氯氢硅系统的多晶硅气相沉积反应模型,通过Chemkin4.0耦合气相反应、表面反应机理,利用流体力学软件Fluent 6.3.26数值求解.根据模拟结果绘制了进气温度、进气组成、沉积表面温度以及反应压力与硅沉积速率的关系曲线,阐述了这些条件对于硅沉积速率的影响,同时把模拟结果与文献中的实验数据和计算结果进行对比.结果表明,硅沉积速率随反应温度和反应压力的提高而提高,随进气温度的提高而提高,当氢气摩尔组成低于0.8时,与氢气物质的量组成成正比,氢气物质的量组成大于0.8时,与氢气摩尔组成成反比.  相似文献   
19.
闫兆文  王娇  乔坚栗  谌文杰  杨盼  肖彤  杨建红 《中国物理 B》2016,25(6):67102-067102
A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed.The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing(P/E) operations at various P/E voltages are discussed.The simulated results show that present memory exhibits a large memory window of 57.5 V,and a high read current on/off ratio of ≈ 10~3.Compared with the reported experimental results,these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects,which shows great promise in device designing and practical application.  相似文献   
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