采用热处理方法提高MEH-PPV单层聚合物有机发光二极管发光性能的研究

对以MEH－PPV为发光层的单层聚合物有机发光二极管（OLED）器件在最佳条件下进行真空热处理，并用金相显微镜观察施加电压后器件的阴极表面形貌。发现处理后的器件阴极表面的气泡及黑斑明显减少。器件的发光性能显著提高。与未经处理的器件相比，最大相对发光强度提高了一个数量级、启亮电压降低了2．0V，半寿命提高了12．7倍。初步分析表明热处理方法提高器件发光性能的主要原因在于有效地减少了器件在工作过程中由于焦耳热产生的某些气体，从而减少阴极表面气泡及黑斑的出现，另一方面，热处理方法也增强了有机发光层与阴极接触界面的结合力，提高电子注入水平。     

移动互联网和它的增值业务

概述 通信发展的几个必然趋势 理想通信的目的:任何时间;任何地方;任何空间能随机地找到任何人,传送任何信息,全球一个网.     

YAG激光打标机光笔中会聚出纤光的光学系统

智能化大幅面激光打标机中的光笔,采用本文叙述的光学系统会聚多模石英光纤出射的大功率YAG激光,通常能以小于0.2mm的线宽长时间连续地在工件上刻划,仔细调焦后线宽达0.1mm;手持此光笔可进行人工刻写、画及焊接电子元件等.     

Analysis of saltation characteristics of bed-load transport in flowing water

The study of bed-load transport is of great significance both in theory and in practice. This paper discusses the saltation of bed-load solid grains in flowing water. Experiments and theoretic analysis have been made by means of high-speed photographing and advanced data processing technique with a combined method based on mechanical and statistical theories. It indicates that the saltation is the main form of the bed-load transport under ordinary flowing conditions. In the meantime, taking successive saltation as the model of bed-load transport, systematic analysis has been made with regard to the kinematic properties and mechanism of saltation. The statistical analysis shows that the probability density functions of the relative height and length of saltation are in conformity with Γ-type distribution, while the probability density functions of the relative velocities of saltation are in conformity with the Gaussian distribution. The project supported by National Natural Science Foundation of China     

基于偶联反应新极谱法测定痕量亚硝酸根的研究——Ⅱ.以苯酚为偶联试剂

本文研究了苯酚在氨性缓冲溶液中与NO_2~--磺胺重氮盐偶联反应的实验条件,建立了一个灵敏快速测定痕量NO_2~-的新方法。NO_2~-离子浓度在1.0×10~(-10)～4.8×10~(-7)g/ml范围内,与峰高呈良好的线性关系.4000倍量NO_3~-存在不干扰.     

Optimization-based placement algorithm for BiCMOS leaf cellgeneration

We present a transistor placement algorithm for the automatic layout synthesis of logic and interface cells comprised of a mixture of MOS and bipolar devices. Our algorithm is applicable to BiCMOS logic cells, ECL logic cells as well as TTL, CMOS and ECL compatible input/output (I/O) cells. The transistor placement problem is transformed into a layout floorplan design problem with a mixture of rigid and flexible modules. A constructive “branch-and-bound” algorithm is used to minimize the area of synthesized circuits subject to pre-placement constraints. Experimental results indicate that the algorithm can produce efficient placements under fixed-height constraints. The design space exploration mechanism can be controlled by the user so as to apportion computing resources judiciously     

On real-time databases: concurrency control and scheduling

In addition to maintaining database consistency as in conventional databases, real-time database systems must also handle transactions with timing constraints. While transaction response time and throughput are usually used to measure a conventional database system, the percentage of transactions satisfying the deadlines or a time-critical value function is often used to evaluate a real-time database system. Scheduling real-time transactions is far more complex than traditional real-time scheduling in the sense that (1) worst case execution times are typically hard to estimate, since not only CPU but also I/O requirement is involved; and (2) certain aspects of concurrency control may not integrate well with real-time scheduling. In this paper, we first develop a taxonomy of the underlying design space of concurrency control including the various techniques for achieving serializability and improving performance. This taxonomy provides us with a foundation for addressing the real-time issues. We then consider the integration of concurrency control with real-time requirements. The implications of using run policies to better utilize real-time scheduling in a database environment are examined. Finally, as timing constraints may be more important than data consistency in certain hard realtime database applications, we also discuss several approaches that explore the nonserializable semantics of real-time transactions to meet the hard deadlines     

In-plane transport properties of Si/Si1-xGexstructure and its FET performance by computer simulation

Transport properties of ungated Si/Si_1-xGe_x are studied by an ensemble Monte Carlo technique. The device performance is studied with a quantum hydrodynamic equation method using the Monte Carlo results. The phonon-scattering limited mobility is enhanced over bulk Si, and is found to reach 23000 cm²/Vs at 77 K and 4000 cm²/Vs at 300 K. The saturation velocity is increased slightly compared with the bulk value at both temperatures. A significant velocity overshoot, several times larger than the saturation velocity, is also found. In a typical modulation-doped field-effect-transistor, the calculated transconductance for a 0.18 μm gate device is found to be 300 mS/mm at 300 K. Velocity overshoot in the strained Si channel is observed, and is an important contribution to the transconductance. The inclusion of the quantum correction increases the total current by as much as 15%     

Atmospheric and low pressure shadow masked MOVPE growth of InGaAs(P)/InP and (In)GaAs/(Al)GaAs heterostructures and quantum wells

The shadow masked growth technique is presented as a tool to achieve thickness and bandgap variations laterally over the substrate during metalorganic vapor phase epitaxy. Lateral thickness and bandgap variations are very important for the fabrication of photonic integrated circuits, where several passive and active optical components need to be integrated on the same substrate. Several aspects of the shadow masked growth are characterized for InP based materials as well as for GaAs based materials. Thickness reductions are studied as a function of the mask dimensions, the reactor pressure, the orientation of the masked channels and the undercutting of the mask. The thickness reduction is strongly influenced by the mask dimensions and the reactor pressure, while the influence of the orientation of the channels and the amount of undercutting is only significant for narrow mask windows. During shadow masked growth, there are not only thickness variations but also compositional variations. Therefore, we studied the changes in In/Ga and As/P ratios for InGaAs and InGaAsP layers. It appears that mainly the In/Ga-ratio is responsible for compositional changes and that the As/P-ratio remains unchanged during shadow masked growth.     

Resilient metal spring network silicone-matrix composite for separable interconnections

Resilient metal spring silicone-matrix conducting composites for separable interconnections in electronics were fabricated by the impregnation of silicone into a preform comprising randomly oriented C-shaped Cu-Be springs and a small proportion of Sn-Pb solder, which served to connect the springs at some of their intersections. Composites containing 6.1-9.8 vol.% total filler exhibited volume electrical resistivity 0.5-1.0 mΩ.cm and contact resistivity (with copper) 11-17 mΩ.cm². A compressive stress of about 30 kPa was needed for the low contact resistivity to be reached. The volume 17-26% and the contact resistivity increased by 5% after heating in air at 130-150°C for seven days. Composites containing <9 vol.% total filler showed no stress relaxation for seven days at 6.0% strain.