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71.
Guantie Deng 《Bulletin des Sciences Mathématiques》2007,131(1):53
In this paper, using a modified Poisson kernel in an upper half-space, we prove that a harmonic function u(z) in a upper half space with its positive part u+(x)=max{u(x),0} satisfying a slowly growing condition can be represented by its integral in the boundary of the upper half space, the integral representation is unique up to the addition of a harmonic polynomial, vanishing in the boundary of the upper half space and that its negative part u−(x)=max{−u(x),0} can be dominated by a similar slowly growing condition, this improves some classical result about harmonic functions in the upper half space. 相似文献
72.
Films of polytetrafluoroethylene (PTFE) were exposed to sodium naphthalenide (Na/naphtha) etchant so as to defluorinate the surface for obtaining hydroxyl functionality. Surface-initiators were immobilized on the PTFE films by esterification of 4,4′-azobis(4-cyanopentanoic acid) (ACP) and the hydroxyl groups covalently linked to the surface. Grafting of polymer brushes on the PTFE films was carried out by the surface-initiated free radical polymerization. Homopolymers brushes of methyl methacrylate (MMA) were prepared by free radical polymerization from the azo-functionalized PTFE surface. The chemical composition and topography of the graft-functionalized PTFE surfaces were characterized by X-ray photoelectron spectroscopy (XPS), attenuated total reflectance (ATR) FT-IR spectroscopy and atomic force microscopy (AFM). Water contact angles on PTFE films were reduced by surface grafting of MMA. 相似文献
73.
本文根据P.N.T.Unwin和R.Henderson等人提出的对生物大分子晶体的囹象处理方法,对无染色的牛肝过氧化氢酶薄晶的显微象和衍射图进行了图象处理,最后得到了牛肝过氧化氢酶薄晶的二维结构。从中可以看出,牛肝过氧化氢酶薄晶的一个单胞由4个子胞组成,4个子胞排列方向各异。 相似文献
74.
提出了由一个变迹IDT叉指换能器和一个均匀IDT组成的SAW滤波器简化衍射频响的计算方法,即将均匀IDT简化成单根指计算其衍射频响。该方法与未简化衍射频响的计算方法相比,计算量大为减小,前者约为后者的(N为均匀IDT的指对数)。并给出了一个实例,用未简化与简化方法分别计算了其衍射频响,结果表明,两者符合得较好。 相似文献
75.
Yangdong Deng Maly W.P. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2005,13(6):668-677
The excessive interconnection delay and fast increasing development cost, as well as complexity of the single-chip integration of different technologies, are likely to become the major stumbling blocks for the success of monolithic system-on-chips. To address the above problems, this paper investigates a new VLSI integration paradigm, the so-called 2.5-dimensional (2.5-D) integration scheme. Using this scheme, a VLSI system is implemented as a three-dimensional stacking of monolithic chips. A cost analysis framework was developed to justify the 2.5-D integration scheme from an economic point of view. Enabling technologies for the new integration scheme are also reviewed. 相似文献
76.
关于不完全双二次非协调板元的误差估计 总被引:1,自引:0,他引:1
本文在[1,2]的基础上,对不完全双二次板元作了进一步的讨论,不仅得到了最优的L~2—误差估计,改进了[1]的相应结果,而且利用“辅助元技巧”并结合正则Green函数法,得到了拟最优的L~∞—误差估计. 相似文献
77.
本利用矩阵对的标准相关分解,得到了矩阵方程(A^TXB,B^TXB)=(C,D)反对称解存在的充分必要条件及通解表达式,同时给出了解关于已知矩阵的最佳逼近. 相似文献
78.
PetaStar: a petabit photonic packet switch 总被引:6,自引:0,他引:6
Chao H.J. Kung-Li Deng Zhigang Jing 《Selected Areas in Communications, IEEE Journal on》2003,21(7):1096-1112
This paper presents a new petabit photonic packet switch architecture, called PetaStar. Using a new multidimensional photonic multiplexing scheme that includes space, time, wavelength, and subcarrier domains, PetaStar is based on a three-stage Clos-network photonic switch fabric to provide scalable large-dimension switch interconnections with nanosecond reconfiguration speed. Packet buffering is implemented electronically at the input and output port controllers, allowing the central photonic switch fabric to transport high-speed optical signals without electrical-to-optical conversion. Optical time-division multiplexing technology further scales port speed beyond electronic speed up to 160 Gb/s to minimize the fiber connections. To solve output port contention and internal blocking in the three-stage Clos-network switch, we present a new matching scheme, called c-MAC, a concurrent matching algorithm for Clos-network switches. It is highly distributed such that the input-output matching and routing-path finding are concurrently performed by scheduling modules. One feasible architecture for the c-MAC scheme, where a crosspoint switch is used to provide the interconnections between the arbitration modules, is also proposed. With the c-MAC scheme, and an internal speedup of 1.5, PetaStar with a switch size of 6400 /spl times/ 6400 and total capacity of 1.024 petabit/s can be achieved at a throughput close to 100% under various traffic conditions. 相似文献
79.
80.