1.6 Tbit/s (40/spl times/40 Gbit/s) DPSK transmission over 3/spl times/100 km of TeraLight fibre with direct detection

By transmitting 40 channels over 300 km of TeraLight fibre, it is shown that optical differential phase shift keying can be used in 100 GHz-spaced 40 Gbit/s systems, with direct detection and a simple receiving filter. Chromatic dispersion tolerance around 300 ps/nm is also measured, compared to 70 ps/nm for NRZ.     

Nanoweb Formation: 2D Self‐Assembly of Semiconductor Gallium Oxide Nanowires/Nanotubes

This paper reports a method to produce networks of crystalline gallium oxide comprised of one‐dimensional (1D) nanostructures. Because of the unique arrangement of wires, these crystalline networks are termed as ‘nanowebs’. Nanowebs are of great technological interest since they contain wire densities of the order of 10⁹ cm^–2. A possible mechanism for the fast self‐assembly of crystalline metal oxide nanowires involves multiple nucleation and coalescence via oxidation–reduction reactions at the molecular level. The preferential growth of nanowires parallel to the substrate enabled them to coalesce into regular polygonal networks. The individual segments of the polygonal network consist of both nanowires and nanotubules of β‐gallium oxide. Individual wire properties contribute to a nanoweb’s overall capacity and the implications for devices based on nanowebs are expected to be enormous.     

Programmable group-delay module using binary polarization switching

We demonstrate the first programmable group-delay module based on polarization switching. With a unique binary tuning mechanism, the device can generate any differential group delay value from -45 to +45 ps with a resolution of 1.40 ps, or any true-time-delay value from 0 to 45 ps with a resolution of 0.7 ps. The delay varying speeds for both applications are under 1 ms and can be as fast as 0.1 ms. We evaluate both the dynamic and static performances of the device while paying special attention to its dynamic figures of merit for polarization-mode dispersion emulation and compensation applications. Our experiment shows that the device exhibits a negligible transient-effect induced power penalty (<0.2 dB) in a 10-Gb/s nonreturn-to-zero system.     

Positively Thermo‐Sensitive Monodisperse Core–Shell Microspheres

In this paper, we report on a novel family of monodisperse thermo‐sensitive core–shell hydrogel microspheres that is featured with high monodispersity and positively thermo‐responsive volume phase transition characteristics with tunable swelling kinetics, i.e., the particle swelling is induced by an increase rather than a decrease in temperature. The microspheres were fabricated in a three‐step process. In the first step, monodisperse poly(acrylamide‐co‐styrene) seeds were prepared by emulsifier‐free emulsion polymerization. In the second step, poly(acrylamide) or poly[acrylamide‐co‐(butyl methacrylate)] shells were fabricated on the microsphere seeds by free radical polymerization. In the third step, the core–shell microspheres with poly‐ (acrylamide)/poly(acrylic acid) based interpenetrating polymer network (IPN) shells were finished by a method of sequential IPN synthesis. The proposed monodisperse core–shell microspheres provide a new mode of the phase transition behavior for thermo‐sensitive “smart” or “intelligent” monodisperse micro‐actuators that is highly attractive for targeting drug delivery systems, chemical separations, sensors, and so on.     

An alternative blind feedforward symbol timing estimator using two samples per symbol

Recently, S.J. Lee proposed a blind feedforward symbol timing estimator that exhibits low computational complexity and requires only two samples per symbol (see IEEE Commun. Lett., vol.6, p.205-7, 2002). We analyze Lee's estimator rigorously by exploiting efficiently the cyclostationary statistics present in the received oversampled signal; its asymptotic (large sample) bias and mean-square error (MSE) are derived in closed-form expression. A new blind feedforward timing estimator that requires only two samples per symbol and presents the same computational complexity as Lee's estimator is proposed. It is shown that the proposed new estimator is asymptotically unbiased and exhibits smaller MSE than Lee's estimator. Computer simulations are presented to illustrate the performance of the proposed new estimator with respect to Lee's estimator and existing conventional estimators.     

Hotspot wireless LANs to enhance the performance of 3G and beyond cellular networks

At present, WLANs supporting broadband multimedia communications are being developed and deployed around the world. Standards include HIPERLAN/2 defined by ETSI BRAN and the 802.11 family defined by the IEEE. These systems provide channel adaptive data rates up to 54 Mb/s (in a 20 MHz channel spacing) over short ranges up to 200 m. The HIPERLAN/2 standard also specifies a flexible radio access network that can be used with a variety of core networks, including UMTS. It is likely that WLANs will become an important complementary technology to 3G cellular systems and will typically be used to provide hotspot coverage. In this article the complementary use of WLANs in conjunction with UMTS is presented. In order to quantify the capacity enhancement and benefits of cellular/hotspot interworking we have combined novel ray tracing, software-simulated physical layer performance results, and optimal base station deployment analysis. The study focuses on an example deployment using key lamppost mounted WLAN access points to increase the performance (in terms of capacity) of a cellular network.     

Formation of C49-TiSi2 in flash memories: a nucleation controlled phenomenon?

The formation of Ti silicides has been examined in flash memories with 0.25 μm linewidth by X-ray diffraction, scanning electron microscopy, and transmission electron microscopy. It has been observed that, after the first rapid thermal process and the selective metal etch, there is no silicide on the source and on a majority of drain contacts while C49-TiSi₂ is found on the gate. A pre-amorphisation implant increases drastically the formation of C49-TiSi₂ in the drain zone while modifications of annealing conditions have little impact. These results indicate that the formation of C49-TiSi₂ is most likely controlled by nucleation and that this nucleation is sensitive to both the width and the length of the reaction zone. The formation of a Ti rich silicide may play an important role in this nucleation by decreasing the driving force for the formation of C49-TiSi₂. Curiously enough, the formation of C49-TiSi₂ appears thus as a major concern for the salicide process in flash memories.     

Origin of the threshold voltage instability in SiO/sub 2//HfO/sub 2/ dual layer gate dielectrics

The magnitude of the V/sub T/ instability in conventional MOSFETs and MOS capacitors with SiO/sub 2//HfO/sub 2/ dual-layer gate dielectrics is shown to depend strongly on the details of the measurement sequence used. By applying time-resolved measurements (capacitance-time traces and charge-pumping measurements), it is demonstrated that this behavior is caused by the fast charging and discharging of preexisting defects near the SiO/sub 2//HfO/sub 2/ interface and in the bulk of the HfO/sub 2/ layer. Based on these results, a simple defect model is proposed that can explain the complex behavior of the V/sub T/ instability in terms of structural defects as follows. 1) A defect band in the HfO/sub 2/ layer is located in energy above the Si conduction band edge. 2) The defect band shifts rapidly in energy with respect to the Fermi level in the Si substrate as the gate bias is varied. 3) The rapid energy shifts allows for efficient charging and discharging of the defects near the SiO/sub 2//HfO/sub 2/ interface by tunneling.     

Verification structures for transmission line pulse measurements

Test structures intended for performance verification of transmission line pulse (TLP) systems have been designed and tested. They consist of simple resistors in either copper or silicide clad polysilicon. The copper structures proved unsuitable due to excess heating and melting of any reasonable geometry. The silicide clad polysilicon proved more successful. A simple model of resistive heating accounts for observed nonlinearity in the structures under high current stress. The availability of a verification structure on wafer ensures the proper performance of the full measurement system, including contact to the wafer and the pad structure, ensuring valid TLP measurements.     

Study of internal behavior in a vertical DMOS transistor under short high current stress by an interferometric mapping method

Current distribution in vertical double-diffused MOS (DMOS) transistors of a Smart Power Technology are investigated under high current, short duration operation conditions by means of a backside laser interferometric thermal mapping technique. DMOS devices of different areas are studied under pulsed gate forward operation mode and under electrostatic discharge (ESD)-like stress with floating and grounded gate. The internal behavior of the devices observed by thermal mapping under these stress conditions is correlated with the electrical characteristics.