Method for Preparation of Semiconductor Quantum‐Rod Lasers in a Cylindrical Microcavity

An efficient method for preparation of semiconductor quantum rod films for robust lasing in a cylindrical microcavity is reported. A capillary tube, serving as the laser cavity, is filled with a solution of nanocrystals and irradiated with a series of intense nanosecond laser pulses to produce a nanocrystal film on the capillary surface. The films exhibit intense room‐temperature lasing in whispering‐gallery modes that develop at the film–capillary interface as corroborated from the spacing detected for the lasing modes. Good lasing stability is observed at moderate pump powers. The method was applied successfully to several quantum‐rod samples of various sizes.     

Exposed Die-Top Encapsulation Molding for an Improved High- Performance Flip Chip BGA Package

The recent advancement in high- performance semiconductor packages has been driven by the need for higher pin count and superior heat dissipation. A one-piece cavity lid flip chip ball grid array (BGA) package with high pin count and targeted reliability has emerged as a popular choice. The flip chip technology can accommodate an I/O count of more than five hundreds500, and the die junction temperature can be reduced to a minimum level by a metal heat spreader attachment. None the less, greater expectations on these high-performance packages arose such as better substrate real estate utilization for multiple chips, ease in handling for thinner core substrates, and improved board- level solder joint reliability. A new design of the flip chip BGA package has been looked into for meeting such requirements. By encapsulating the flip chip with molding compound leaving the die top exposed, a planar top surface can be formed. A, and a flat lid can then be mounted on the planar mold/die top surface. In this manner the direct interaction of the metal lid with the substrate can be removed. The new package is thus less rigid under thermal loading and solder joint reliability enhancement is expected. This paper discusses the process development of the new package and its advantages for improved solder joint fatigue life, and being a multichip package and thin core substrate options. Finite-element simulations have been employed for the study of its structural integrity, thermal, and electrical performances. Detailed package and board-level reliability test results will also be reported     

Novel method for simultaneous formation of wires and vias of a printed circuit board using nanoporous body

A new type of a flexible printed circuit board with landless vias is developed using a novel method called interconnection via nanoporous structure (INPS). This method can make wires and vias of the printed circuit board simultaneously by a single photo-exposure process. A new photo-induced selective plating method was used to impregnate a nanoporous substrate with copper, and a new photomask was designed, which constitutes of a completely vacant large hole for via and aggregation patterns of very fine holes for wire. Because of the simple process, the INPS board is characterized by landless vias and very fine circuit. Owing to the structure, it is also characterized by flexibility and detachable wires.     

Design methodologies for high-performance noise-tolerant XOR-XNOR circuits

Scaling down to deep submicrometer (DSM) technology has made noise a metric of equal importance as compared to power, speed, and area. Smaller feature size, lower supply voltage, and higher frequency are some of the characteristics for DSM circuits that make them more vulnerable to noise. New designs and circuit techniques are required in order to achieve robustness in presence of noise. Novel methodologies for designing energy-efficient noise-tolerant exclusive-OR-exclusive- NOR circuits that can operate at low-supply voltages with good signal integrity and driving capability are proposed. The circuits designed, after applying the proposed methodologies, are characterized and compared with previously published circuits for reliability, speed and energy efficiency. To test the driving capability of the proposed circuits, they are embedded in an existing 5-2 compressor design. The average noise threshold energy (ANTE) is used for quantifying the noise immunity of the proposed circuits. Simulation results show that, compared with the best available circuit in literature, the proposed circuits exhibit better noise-immunity, lower power-delay product (PDP) and good driving capability. All of the proposed circuits prove to be faster and successfully work at all ranges of supply voltage starting from 3.3 V down to 0.6 V. The savings in the PDP range from 94% to 21% for the given supply voltage range respectively and the average improvement in the ANTE is 2.67X.     

Supermedia-enhanced Internet-based telerobotics

This paper introduces new planning and control methods for supermedia-enhanced real-time telerobotic operations via the Internet. Supermedia is the collection of video, audio, haptic information, temperature, and other sensory feedback. However, when the communication medium used, such as the Internet, introduces random communication time delay, several challenges and difficulties arise. Most importantly, random communication delay causes instability, loss of transparency, and desynchronization in real-time closed-loop telerobotic systems. Due to the complexity and diversity of such systems, the first challenge is to develop a general and efficient modeling and analysis tool. This paper proposes the use of Petri net modeling to capture the concurrency and complexity of Internet-based teleoperation. Combined with the event-based planning and control method, it also provides an efficient analysis and design tool to study the stability, transparency, and synchronization of such systems. In addition, the concepts of event transparency and event synchronization are introduced and analyzed. This modeling and control method has been applied to the design of several supermedia-enhanced Internet-based telerobotic systems, including the bilateral control of mobile robots and mobile manipulators. These systems have been experimentally implemented in three sites test bed consisting of robotic laboratories in the USA, Hong Kong, and Japan. The experimental results have verified the theoretical development and further demonstrated the stability, event transparency, and event synchronization of the systems.     

Minimax estimation of deterministic parameters in linear models with a random model matrix

We consider the problem of estimating an unknown deterministic parameter vector in a linear model with a random model matrix, with known second-order statistics. We first seek the linear estimator that minimizes the worst-case mean-squared error (MSE) across all parameter vectors whose (possibly weighted) norm is bounded above. We show that the minimax MSE estimator can be found by solving a semidefinite programming problem and develop necessary and sufficient optimality conditions on the minimax MSE estimator. Using these conditions, we derive closed-form expressions for the minimax MSE estimator in some special cases. We then demonstrate, through examples, that the minimax MSE estimator can improve the performance over both a Baysian approach and a least-squares method. We then consider the case in which the norm of the parameter vector is also bounded below. Since the minimax MSE approach cannot account for a nonzero lower bound, we consider, in this case, a minimax regret method in which we seek the estimator that minimizes the worst-case difference between the MSE attainable using a linear estimator that does not know the parameter vector, and the optimal MSE attained using a linear estimator that knows the parameter vector. For analytical tractability, we restrict our attention to the scalar case and develop a closed-form expression for the minimax regret estimator.     

The First Template‐Free Growth of Crystalline Silicon Microtubes

A simple template‐free high‐temperature evaporation method was developed for the growth of crystalline Si microtubes for the first time. As‐grown Si microtubes were characterized using X‐ray diffraction, scanning electron microscopy, transmission electron microscopy, and room‐temperature photoluminescence. The lengths of the Si tubes can reach several hundreds of micrometers; some of them have lengths on the order of millimeters. Each tube has a uniform outer diameter along its entire length, and the typical outer diameter is ≈ 2–3 μm. Most of the tubes have a wall thickness of ≈ 400–500 nm, though a considerable number of them exhibit a very thin wall thickness of ≈ 50 nm. Room‐temperature photoluminescence measurement shows the as‐synthesized Si microtubes have two strong emission peaks centered at ≈ 589 nm and ≈ 617 nm and a weak emission peak centered at ≈ 455 nm. A possible mechanism for the formation of these Si tubes is proposed. We believe that the present discovery of the crystalline Si microtubes will promote further experimental studies on their physical properties and smart applications.     

Low-temperature poly-SiGe alloy growth of high gain/speed pin infrared photosensor with gold-induced lateral crystallization (Au-ILC)

The hydrogenated poly-silicon germanium (poly-SiGe:H) epitaxial film has been investigated using gold-induced lateral crystallization (Au-ILC) technology on a-SiGe:H layers at 10-h 350/spl deg/C annealing temperature and 60-sccm hydrogen (H/sub 2/) content. Using this optimal condition, the growth rate of the induced Au was as large as 15.9 /spl mu/m/h. With a low annealing temperature (/spl les/400/spl deg/C) and large growth rate, this novel technology will be noticeably useful for poly-SiGe:H pin IR-sensing fabrication on a conventional precoated indium tin oxide (ITO)-glass substrate. Under a 1-/spl mu/W IR-LED incident light (with peak wave length at 710 nm) and at a 5-V biased voltage, the poly-SiGe:H pin IR sensor developed by the Au-ILC technology, i.e., an Al (anode)/n poly-SiGe:H/i poly-SiGe:H/p poly-SiGe:H/ITO (cathode)/glass-substrate structure allowed for maximum optical gain and response speed. The optical gains and the response speeds were almost 600 and 130%, respectively, better than that of a traditional pin type. Meanwhile, the FWHM of a poly-SiGe:H pin sensor with Au-ILC technology was reduced from 280 to 150 nm. This reveals excellent IR-sensing selectivity. These IR-sensing trials demonstrated again that the proposed Au-ILC technology has very useful application in the field of low cost integrated circuits on optoelectronic applications.     

A CMOS multichannel 10-Gb/s transceiver

We describe a CMOS multichannel transceiver that transmits and receives 10 Gb/s per channel over balanced copper media. The transceiver consists of two identical 10-Gb/s modules. Each module operates off a single 1.2-V supply and has a single 5-GHz phase-locked loop to supply a reference clock to two transmitter (Tx) channels and two receiver (Rx) channels. To track the input-signal phase, the Rx channel has a clock recovery unit (CRU), which uses a phase-interpolator-based timing generator and digital loop filter. The CRU can adjust the recovered clock phase with a resolution of 1.56 ps. Two sets of two-channel transceiver units were fabricated in 0.11-/spl mu/m CMOS on a single test chip. The transceiver unit size was 1.6 mm /spl times/ 2.6 mm. The Rx sensitivity was 120-mVp-p differential with a 70-ps phase margin for a common-mode voltage ranging from 0.6 to 1.0 V. The evaluated jitter tolerance curve met the OC-192 specification.