HIGH ACCURACY FINITE VOLUME ELEMENT METHOD FOR TWO-POINT BOUNDARY VALUE PROBLEM OF SECOND ORDER ORDINARY DIFFERENTIAL EQUATIONS

1　ＩｎｔｒｏｄｕｃｔｉｏｎＦｉｎｉｔｅｖｏｌｕｍｅｅｌｅｍｅｎｔｍｅｔｈｏｄｏｒＦＶＥＭｕｓｅｓａｖｏｌｕｍｅｉｎｔｅｇｒａｌｆｏｒｍｕｌａｔｉｏｎｏｆｔｈｅｄｉｆ ｆｅｒｅｎｔｉａｌｅｑｕａｔｉｏｎｗｉｔｈａｆｉｎｉｔｅｐａｒｔｉｔｉｏｎｉｎｇｓｅｔｏｆｖｏｌｕｍｅｔｏｄｉｓｃｒｅｔｉｚｅｔｈｅｅｑｕａｔｉｏｎ ,ｔｈｅｎｒｅ ｓｔｒｉｃｔｓｔｈｅａｄｍｉｓｓｉｂｌｅｆｕｎｃｔｉｏｎｓｔｏａｌｉｎｅａｒｆｉｎｉｔｅｅｌｅｍｅｎｔｓｐａｃｅｔｏｄｉｓｃｒｅｔｉｚｅｔｈｅｓｏｌｕｔｉｏｎ ([1 -4 ] ) .…     

聚乙炔的CH面外振动红外光谱研究

采用从头计算方法，计算了反式和顺式聚乙炔的氢原子在垂直于聚乙炔分子面方向振动的红外光谱，计算表明，Gibson等用红外吸收实验所测得的谱线的确是聚乙炔的CH面外振动产生的谱线，经100℃长时间加热后，顺式聚乙炔变为反式聚炔，但波数为740cm^-1的谱级仍保留5％的强度。     

甲基红染料掺杂的聚乙烯醇薄膜光存储特性的实验研究

用2倍频小型YAG激光(532nm)作为写入光和擦除光,用He-Ne激光器623.8nm线作为读出光,用CCD作为探测器,研究了不同写入光功率下,甲基红/聚乙烯醇(MR/PVA)薄膜光栅生长的动力学过程和不同擦除光功率下,光栅擦除的动力学过程.结合光栅生长曲线的波动现象,对光存储机制进行了新的探讨.实验发现,两写入光和读出光的功率配比为1:1:1时,可获得最大衍射效率,提出读出光对写入过程具有双重作用的物理模型,对此实验结果给出了合理的解释.     

荧光波长对共焦显微镜成像特性的影响

导出了共焦显微镜中不同荧光波长情况下的荧光功率传输函数、三维脉冲响应函数（3D－PSF）和三维光学传递函数（3D－OTF）。结果表明，不同的荧光波长对共焦显微镜的空间截止频率、分辨率、光学传递函数存在明显的影响。当激发波长与荧光波长的比值下降到一定程度时，可以看到明显的失锥现象。     

基于偶联反应新极谱法测定痕量亚硝酸根的研究——Ⅱ.以苯酚为偶联试剂

本文研究了苯酚在氨性缓冲溶液中与NO_2~--磺胺重氮盐偶联反应的实验条件,建立了一个灵敏快速测定痕量NO_2~-的新方法。NO_2~-离子浓度在1.0×10~(-10)～4.8×10~(-7)g/ml范围内,与峰高呈良好的线性关系.4000倍量NO_3~-存在不干扰.     

7.5 Gb/s monolithically integrated clock recovery circuit using PLLand 0.3-μm gate length quantum well HEMT's

A monolithically integrated clock recovery (CR) circuit making use of the phase-locked loop (PLL) circuit technique and enhancement/depletion AlGaAs/GaAs quantum well-high electron mobility transistors (QW-HEMT's) with gate lengths of 0.3 μm has been realized. A novel preprocessing circuit was used. In the PLL a fully-balanced varactorless VCO was applied. The VCO has a center oscillating frequency of about 7.7 GHz and a tuning range greater than 500 MHz. A satisfactory clock signal has been obtained at a bit rate of about 7.5 Gb/s. The power consumption is less than 200 mW at a supply voltage of -5 V     

New efficient designs for XOR and XNOR functions on the transistorlevel

Two new methods are proposed to implement the exclusive-OR and exclusive-NOR functions on the transistor level. The first method uses non-complementary signal inputs and the least number of transistors. The other one improves the performance of the prior method but two more transistors are utilized. Both of them have been fully simulated by HSPICE on a SUN SPARC 2 workstation     

Effects of hot carrier induced interface state generation insubmicron LDD MOSFET's

A two-dimensional numerical simulation including a new interface state generation model has been developed to study the performance variation of a LDD MOSFET after a dc voltage stress. The spatial distribution of hot carrier induced interface states is calculated with a breaking silicon-hydrogen bond model. Mobility degradation and reduction of conduction charge due to interface traps are considered. A 0.6 μm LDD MOSFET was fabricated. The drain current degradation and the substrate current variation after a stress were characterized to compare the simulation. A reduction of the substrate current at V_g ≃0.5 V_d in a stressed device was observed from both the measurement and the simulation. Our study reveals that the reduction is attributed to a distance between a maximum channel electric field and generated interface states