从频谱监测和国际协调探讨短波广播频段扩展的可行性

短波广播能够实现远距离和大范围的覆盖，至今仍是进行地区性、全国性及国际性广播覆盖的最好手段之一。ITU在2001年4月批准的1514建议书《30MHz以下广播频段的数字声音广播系统》，正式确定了DRM系统为全球统一的数字广播系统。在短波广播由模拟向数字化过渡的进程中，如何解决短波广播频谱短缺的问题，本文根据国家相关的频谱监测和国际短波频率协调的情况，对短波广播中4～10MHz频谱的扩展可行性进行初步分析。     

DISPERSION COMPENSATION CFBG IN100km 10Gbit／s RECIRCULATING SYSTEMS

A 10Gbit/s recirculating system is configured with Chirped Fiber Bragg Grating (CFBG) for the dispersion compensation. For the first time, the transmission distance in the loop reaches 1000km with bit error rate of 10-9. The effect of the group delay ripple of the fiber grating is also investigated in the recirculating systems, and it is shown that the transmission distance is limited to 4 cycles (4×167.1km ) in the loop with the power penalty fluctuation below 1.0dB. Thus the group delay ripple should be reduced to allow for the wavelength drift of±5GHz. At the end of this letter, the principles are given for designing long haul recirculating systems with dispersion compensation CFBG.     

High-performance and power-efficient CMOS comparators

Several design techniques for high-performance and power-efficient CMOS comparators are proposed. First, the comparator is based on the priority-encoding (PE) algorithm, and the dynamic circuit technique developed specifically for the priority encoder can be applied. Second, the PE function and the subsequent logic functions are merged and efficiently realized in the multiple output domino logic (MODL) to result in a shortened logic depth. The circuit in MODL CMOS is also compact and power efficient because few transistors are needed. Third, the multilevel look-ahead technique is used to shorten the path of priority-token propagation. Finally, the circuit is realized with a latch-based two-stage pipelined structure, and the comparison function is partitioned into two parts, with each part executed in each half of the clock cycle in a delay-balanced manner. Post-layout simulation results show that a 64-b comparator designed with the proposed techniques in a 3-V 0.6-/spl mu/m CMOS technology is 16% faster, 50% smaller, and 79% more power efficient as compared with the all-n-transistor comparator, which is the fastest among the conventional comparators. Measurement results of the test chip conform with simulation results and prove the feasibility of the proposed techniques.     

探针馈电圆柱共形微带天线阻抗特性的FDTD法分析

将圆柱坐标系下非分裂式理想匹配层吸收边界条件(UPML)引入到圆柱共形微带天线的全波分析中，并给出了其中的场量迭代方程，明显地减小了计算空间，简化了编程；提出了圆柱坐标系下考虑有限尺寸探针半径的新算法，使得计算结果更加精确；应用GPOF方法预估了时域晚时响应，使计算时间减少了70％～90％。本文给出的模型能够对任意多层圆柱共形结构的微带天线进行计算，因此对此类天线的CAD设计具有实际意义。     

3G用户细分研究

对3G用户的细分方法及3G目标市场的定位进行了初步的研究，提出了3G用户细分的体系框架和3G目标市场定位的考虑要素及初步的定位建议。     

Surface of Ru/Fe2O3 catalysts used in water-gas shift reaction studied by auger electron spectrometry

Summary Carbon deposits on the surface ofRu/Fe₂O₃ catalysts used in the water-gas shift reaction have been investigated by Auger Electron Spectrometry. A correlation has been found between the thickness of the carbon deposit and the catalytic activity in WGSR. The carbon deposit covers the metallic active centers and blocks their contact with reagents. The dotting of the iron oxide support with sodium has been found to reduce the amount of carbon deposit. .      

差分跳频通信系统的特点及性能

文章介绍了一种新型的短波跳频通信技术——差分跳频,分析了差分跳频技术区别于常规跳频技术的主要特点。针对按序列检测的信号接收方法,对差分跳频通信系统在AWGN信道下的性能进行了理论分析,同时做出相应的计算机仿真,证实了差分跳频通信技术和按序列检测方法的结合,使通信系统在AWGN信道下的性能得到了比较显著的提升。     

稀土在激光熔覆镍基自熔合金中的作用

采用CO2激光器在低碳钢表面进行激光熔覆处理,研究了稀土氧化物在激光熔覆Ni45自熔合金层中的作用.结果表明,加入适量稀土的熔覆合金层组织得到细化,其在还原酸中的耐蚀性和抗高温氧化能力较不加稀土镍基合金熔覆层都有较大提高,更远高于低碳钢.可见,稀土变质的激光熔覆处理对提高低碳钢性能具有重要指导意义.     

Analysis and architecture design of variable block-size motion estimation for H.264/AVC

Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory.