Some formulae for the q-Bernoulli and Euler polynomials of higher order

The purpose of this paper is to give a proof of Kummer type congruence for the q-Bernoulli numbers of higher order, which is an answer to a part of the problem in a previous publication (see Indian J. Pure Appl. Math. 32 (2001) 1565-1570).     

Natural quality two-band LPC coding of speech at 880 bit/s withframe interpolation

A novel frame interpolation technique for two-band linear predictive coding (LPC) vocoders is proposed for maintaining natural speech quality at bit rates below 1 kbit/s. Experimental results show that the speech quality of the proposed vocoder is quite natural at bit rates 880 bit/s and comparable to that of 4.8 kbit/s CELP     

Smart TDI readout circuit for long-wavelength IR detector

A smart time delay and integration (TDI) readout circuit is suggested which performs background suppression, cell-to-cell non-uniformity compensation, and dead pixel correction. Using the smart TDI readout circuit, the integration capacitor area occupying almost the whole area of a unit-cell can be reduced to one-fifth and transimpedance gain can increase by five times. From measurement results, it is found that the skimming current error for a few hundred nA background current is < 1.25 nA corresponding to LSB/2 of ADC and the non-uniformity introduced by cell-to-cell background current variation is reduced to 1.02 nA     

Fuzzy convex sets in median algebras

The fuzzification of convex sets in median algebras is considered, and some of their properties are investigated. A characterization of finite valued fuzzy convex set is given.     

Some new results on superimposed codes

A (w,r) cover‐free family is a family of subsets of a finite set such that no intersection of w members of the family is covered by a union of r others. A (w,r) superimposed code is the incidence matrix of such a family. Such a family also arises in cryptography as the concept of key distribution pattern. In the present paper, we give some new results on superimposed codes. First we construct superimposed codes from super‐simple designs which give us results better than superimposed codes constructed by other known methods. Next we prove the uniqueness of the (1,2) superimposed code of size 9 × 12, the (2,2) superimposed code of size 14 × 8, and the (2,3) superimposed code of size 30 × 10. Finally, we improve numerical values of upper bounds for the asymptotic rate of some (w,r) superimposed codes. © 2004 Wiley Periodicals, Inc.     

使用无线网络分析器调试ZigBee协议系统

本文详细探讨了使用无线网络分析器调试ZigBee协议系统的基本方法,从而便于更好地确保网络的可靠性.     

A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC

A 0.9 V third-order double-sampled delta-sigma audio ADC is presented. A new method using a combination of a switched-RC technique and a floating switched-capacitor double-sampling configuration enabled low-voltage operation without clock boosting or bootstrapping. A three-level quantizer with simple dynamic element matching was used to improve linearity. The prototype IC implemented in a 0.13 CMOS process achieves 92 dB DR, 91 dB SNR and 89 dB SNDR in a 24 kHz audio signal bandwidth, while consuming 1.5 mW from a 0.9 V supply. The prototype operates from 0.65 V to 1.5 V supply with minimal performance degradation.     

A single-chip storage LSI for home networks

Network direct attached storage (NDAS) is a network storage architecture that allows direct attachment of existing ATA/ATAPI devices to Ethernet without a separate server. Unlike other architectures such as NAS, SAN, and USB mass storage, no server computer intervenes between the storage and the client hosts. We describe an NDAS disk controller (NDC) amenable to low-cost single-chip implementation that processes a simplified L3/L4 protocol and converts commands between ATA/ATAPI and Ethernet, while the remaining complex tasks are performed by remote hosts. Unlike NAS architectures that use TCP/IP, NDAS uses a TCP-like lean protocol that lends itself well to high-performance hardware realization. Thanks to the simple NDAS architecture and protocol, an NDC implemented on a single 4 mm /spl times/ 4 mm chip in 0.18 /spl mu/m CMOS technology achieves a maximum throughput of 55 Mbytes/s on gigabit Ethernet, which is comparable to that of a high-performance disk locally attached to a host computer.     

Direct adaptive control of nonminimum phase systems using integralaction

A direct adaptive control scheme is proposed for nonminimum-phase systems in which controller parameters are estimated from the recursive least-squares algorithm and additional auxiliary parameters are obtained from the proposed polynomial identity. A local convergence is guaranteed without any extra condition. Integral action is incorporated into the adaptive controller to eliminate the steady-state error and to satisfy a condition of the unique solution for the polynomial identity. The control law used in this scheme is based on the set-point-on-I-only proportional-integral-derivative (PID) structure