Anatomically constrained electrical impedance tomography forthree-dimensional anisotropic bodies

As shown previously for two-dimensional geometries, anisotropy effects should not be ignored in electrical impedance tomography (EIT) and structural information is important for the reconstruction of anisotropic conductivities. Here, we describe the static reconstruction of an anisotropic conductivity distribution for the more realistic three-dimensional (3-D) case. Boundaries between different conductivity regions are anatomically constrained using magnetic resonance imaging (MRI) data. The values of the conductivities are then determined using gradient-type-algorithms in a nonlinear-indirect approach. At each iteration, the forward problem is solved by the finite element method. The approach is used to reconstruct the 3-D conductivity profile of a canine torso. Both computational performance and simulated reconstruction results are presented together with a detailed study on the sensitivity of the prediction error with respect to different parameters. In particular, the use of an intracavity catheter to better extract interior conductivities is demonstrated     

Modulation characteristic of waveguide-type optical frequency combgenerator

We report the modulation characteristics of a waveguide-type optical frequency comb generator (WG-OFCG) with the advantages of compactness, high modulation index and low driving power. The characteristics of the optical frequency comb (OFC) generated when the modulation index exceeds 2π are discussed. The power of the modulation sidebands was measured by the optical heterodyne method with an external-cavity laser as a local oscillator. The dependence of the modulation index of the WG-OFCG on the modulation frequency up to 40 GHz was measured. The generation span of the OFC at the modulation frequency detuned from an integer multiple of the free spectral range (FSR) is discussed     

Communication network protocol for real-time distributed controland its LSI implementation

A new token-passing mechanism, priority token passing, which features real-time access and fast detection and recovery of transmission errors, is discussed in detail in comparison with standard token-passing protocols, and its large-scale integration (LSI)-oriented design concept is described. Priority token passing includes only a small performance overhead, due to its switching functions, which can change network topology from ring to broadcast medium. A token-holding node passes the token to another node after determining the successor through priority comparison. Errors occurring during token passing can, thus, be detected and corrected simply and promptly. Priority token passing has a simple hardware implementation, requiring only small additions to the frame control circuitry, and has a small implementation overhead. The priority token-passing protocol and two other important network communication functions, dual ring network reconfiguration and high-level data link control (HDLC) normal response mode-based message transmission, are designed as a single finite-state machine, and implemented into a compact LSI chip. This integrated instrument network (IINET) chip provides complete network communication services and requires only three additional external electronic components for operation     

A novel method for elimination of line-current harmonics insingle-stage PFC switching regulators

This paper studies a particular single-stage power-factor-correction (PFC) switching regulator employing a discontinuous-conduction-mode (DCM) boost-input cell and a continuous-current-mode (CCM) forward output cell. Although this single-stage PFC regulator can provide a reasonably high power factor when its PFC stage is operating in discontinuous mode, substantial reduction in line-current harmonics is possible by applying a suitable frequency-modulation scheme. This paper derives a frequency-modulation scheme and proposes a practical implementation using a simple translinear analog circuit. A quantitative analysis on the total harmonic distortion (THD) of the line current when the circuit is subject to a limited range of frequency variations is presented along with some considerations for practical design. Experimental data obtained from a prototype confirms the effectiveness of the proposed frequency-modulation scheme. The proposed analog translinear circuit allows custom integrated circuit implementation, making it a viable low-cost solution to the elimination of line-current harmonics in switching regulators     

Parallel, self-organizing, hierarchical neural networks. II

For pt.I see IEEE Trans. Neural Networks, vol.1, p.167-78 (1990). Parallel, self-organizing, hierarchical neural networks (PSHNNs) involve a number of stages with error detection at the end of each stage, i.e., rejection of error-causing vectors, which are then fed into the next stage after a nonlinear transformation. The stages operate in parallel during testing. Statistical properties and the mechanisms of vector rejection of the PSHNN are discussed in comparison to the maximum likelihood method and the backpropagation network. The PSHNN is highly fault tolerant and robust against errors in the weight values due to the adjustment of the error detection bounds to compensate errors in the weight values. These properties are exploited to develop architectures for programmable implementations in which the programmable parts are reduced to on-off or bipolar switching operations for bulk computations and attenuators for pointwise operations     

Packed hyper-ellipsoid classifiers

Pattern classification is frequently performed using the k-nn algorithm or a neural network. The choice of parameters for the former is often difficult and the amount of data which has to be stored in the classifier can be high. Neural network classifiers can overcome some of these problems but learning is often unreliable and slow. An alternative which combines some of the best features of the k-nn and neural network classifier is described by the authors. The classifier is called a packed hyper-ellipsoid classifier     

The effect of surface roughness on the radiative properties ofpatterned silicon wafers

The radiative properties of patterned silicon wafers have a major impact on the two critical issues in rapid thermal processing (RTP), namely wafer temperature uniformity and wafer temperature measurement. The surface topography variation of the die area caused by patterning and the roughness of the wafer backside can have a significant effect on the radiative properties, but these effects are not well characterized. We report measurements of room temperature reflectance of a memory die, logic die, and various multilayered wafer backsides. The surface roughness of the die areas and wafer backsides is characterized using atomic force microscopy (AFM). These data are subsequently used to assess the effectiveness of thin film optics in providing approximations for the radiative properties of patterned wafers for RTP applications     

Structured genetic algorithm for robust H∞ controlsystems design

A structured genetic algorithm (SGA) approach is developed for robust controller design based on the concept of an H^∞ loop-shaping technique and the method of inequalities. Such an SGA is capable of simultaneously searching the orders and coefficients of the precompensator and postcompensator for the weighted plant. It is, therefore, not necessary to predefine the order of compensators as in usual practice. A multiple objective ranking approach is also incorporated so that the design criteria of extreme plants can be easily achieved. The effectiveness of such a technique is illustrated by a high-purity distillation column design example     

High speed p-type SiGe modulation-doped field-effect transistors

We report on the fabrication and characterization of high-speed p-type modulation-doped field-effect transistors (MODFETs) with 0.7-μm and 1-μm gate-lengths having unity current-gain cut-off frequencies (f_T) of 9.5 GHz and 5.3 GHz, respectively. The devices were fabricated on a high hole mobility SiGe heterostructure grown by ultra-high-vacuum chemical vapor deposition (UHV-CVD). The dc maximum extrinsic transconductance (g_m) is 105 mS/mm (205 mS/mm) at room temperature (77 K) for the 0.7-μm gate length devices. The fabricated devices show good pinch-off characteristics and have a very low gate leakage current of a few μA/mm at room temperature and a few nA/mm at 77 K     

Genetic algorithms: concepts and applications [in engineeringdesign]

This paper introduces genetic algorithms (GA) as a complete entity, in which knowledge of this emerging technology can be integrated together to form the framework of a design tool for industrial engineers. An attempt has also been made to explain “why” and “when” GA should be used as an optimization tool