A model for crack formation during active solid pyrolysis of a char-forming solid: crack patterns; surface area generation; volatile mass efflux

A model is developed for the formation and propagation of cracks in a material sample that is heated at its top surface, pyrolyses, and then thermally degrades to form char. In this work the sample is heated uniformly over its entire top surface by a hypothetical flame (a heat source). The pyrolysis mechanism is described by a one-step overall reaction that is dependent nonlinearly on the temperature (Arrhenius form). Stresses develop in response to the thermal degradation of the material by means of a shrinkage strain caused by local mass loss during pyrolysis. When the principal stress exceeds a prescribed threshold value, the material forms a local crack. Cracks are found to generally originate at the surface in response to heating, but occasionally they form in the bulk, away from ever-changing material boundaries. The resulting cracks evolve and form patterns whose characteristics are described. Quantities examined in detail are: the crack spacing in the pyrolysis zone; the crack length evolution; the formation and nature of crack loops which are defined as individual cracks that have joined to form loops that are disconnected from the remaining material; the formation of enhanced pyrolysis area; and the impact of all of the former quantities on mass flux. It is determined that the mass flux from the sample can be greatly enhanced over its nominal (non-cracking) counterpart. The mass efflux profile qualitatively resembles those observed in Cone Calorimeter tests.     

The method of double averaging: an approach for modeling power-factor-correction switching converters

This paper describes the modeling of power-factor-correction converters under average-current-mode control, which are widely used in switch-mode power supply applications. The objective is to identify stability boundaries in terms of major circuit parameters for facilitating design of such converters. The approach employs a double averaging procedure, which first applies the usual averaging over the switching period and subsequently applies generalized averaging over the mains period. The resulting model, after two averaging steps and application of a harmonic balance procedure, is nonlinear and capable of describing the low-frequency nonlinear dynamics of the system. The parameter ranges within which stable operation is guaranteed can be accurately and easily found using this model. Experimental measurements are provided for verification of the analytical results.     

A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC

A redundant multivalued logic is proposed for high-speed communication ICs. In this logic, serial binary data are received and converted into parallel redundant multivalued data. Then they are restored into parallel binary data. Because of the multivalued data conversion, this logic makes it possible to achieve higher operating speeds than that of a conventional binary logic. Using this logic, a 1:4 demultiplexer (DEMUX, serial-parallel converter) IC was fabricated using a 0.18-/spl mu/m CMOS process. The IC achieved an operating speed of 10 Gb/s with a supply voltage of only 1.3 V and with power consumption of 38 mW. This logic may achieve CMOS communication ICs with an operating speed several times greater than 10 Gb/s.     

Lateral ion implant straggle and mask proximity effect

Lateral scattering of retrograde well implants is shown to have an effect on the threshold voltage of nearby devices. The threshold voltage of both NMOSFETs and PMOSFETs increases in magnitude for conventional retrograde wells, but for triple-well isolated NMOSFETs the threshold voltage decreases for narrow devices near the edge of the well. Electrical data, SIMS, and SUPREM4 simulations are shown that elucidate the phenomenon.