Self-reflective segmentation of human bodily motions using recurrent neural networks

For realizing a naturalistic collaboration between the human and the robot, we have to establish the intention sharing from the series of motion data that are observed and exchanged between the human and the machine. In a word, this is a problem to detect "meanings" out of the digitized data stream. In this paper, we propose a novel approach based on semiosis, and present a method of interpreting bodily motions using recurrent neural networks called Elman networks. We made some experiments using the raw data acquired while a human performs a simple task of fetching objects by stretching and folding his/her arm, and demonstrate that the network can learn invariant features of the generalized motion concepts, classify the motion by referring to self-organized memory structure, and understand a task structure of the observed human bodily motion. These capabilities are essential for machine intelligence to establishing the human-robot shared autonomy, a new style of human-machine collaboration proposed in the area of robotics.     

Evaluation and optimization of package processing and design through solder joint profile prediction

Solder joints are generated using a variety of methods to provide both mechanical and electrical connection for applications such as flip-chip, wafer level packaging, fine pitch, ball-grid array, and chip scale packages. Solder joint shape prediction has been incorporated as a key tool to aid in process development, wafer level and package level design and development, assembly, and reliability enhancement. This work demonstrates the application of an analytical model and the Surface Evolver software in analyzing a variety of solder processing methods and package types. Bump and joint shape prediction was conducted for the design of wafer level bumping, flip-chip assembly, and wafer level packaging. The results from the prediction methodologies are validated with experimentally measured geometries at each level of design.     

Scaling planar silicon devices

The generation-over-generation scaling of critical CMOS technology parameters is ultimately bound by nonscalable limitations, such as the thermal voltage and the elementary electronic charge. Sustained improvement in performance and density has required the introduction of new device structures and materials. Partially depleted SOI, a most recent MOSFET innovation, has extended VLSI performance while introducing unique idiosyncrasies. Fully depleted SOI is one logical extension of this device design direction. Gate dielectric tunneling, device self-heating, and single-event upsets present developers of these next-generation devices with new challenges. Strained silicon and high-permittivity gate dielectric are examples of new materials that will enable CMOS developers to continue to deliver device performance enhancements in the sub-100 nm regime.     

Effects of SiN passivation and high-electric field on AlGaN-GaN HFET degradation

The authors report on the effects of silicon nitride (SiN) surface passivation and high-electric field stress (hot electron stress) on the degradation of undoped AlGaN-GaN power HFETs. Stressed devices demonstrated a decrease in the drain current and maximum transconductance and an increase in the parasitic drain series resistance, gate leakage, and subthreshold current. The unpassivated devices showed more significant degradation than SiN passivated devices. Gate lag phenomenon was observed from unpassivated devices and removed by SiN passivation. However, SiN passivated devices also showed gate lag phenomena after high-electric field stress, which suggests possible changes in surface trap profiles occurred during high-electric field stress test.     

High-gain hybrid amplifier consisting of cascaded fluoride-based TDFA and silica-based EDFA in 1458-1540 nm wavelength region

A hybrid optical fibre amplifier is described that consists of a fluoride-based thulium-doped fibre amplifier and a silica-based erbium-doped fibre amplifier connected in a cascade. The amplifier has a gain of more than 25 dB and a noise figure of less than 9 dB over a wide wavelength region of 1458-1540 nm.     

Supply-side hurdles in Internet B2C e-commerce: an empirical investigation

Given Hong Kong's special circumstances of small physical size, advanced infrastructure, and low shopping cost, a survey is designed under which supply-side problems in Internet business-to-consumer (B2C) e-commerce are indirectly revealed by responses on the demand side. Difficulties arising from the reluctance to answer questionnaires on the part of e-firms wary about trade and innovation secrets and their small number at the outset are thereby overcome. Survey data on demand-side obstacle factors in the form of perceived low e-shopping comparability, e-shopping inconvenience, e-transaction insecurity, and poor Internet privacy, together with orientation toward social interaction and low awareness on the part of consumers, translate into information on notionally matching supply-side hurdles. Regression analysis and hypothesis testing indicate statistical significance for the above hurdle factors in terms of impact on individual unwillingness to shop online. These results add to the inductive basis for future research into a general demand-supply theory of Internet B2C e-commerce and offer an empirically-grounded position against which the effects of later supply-side changes can be evaluated. Useful information also follows for engineer-managers seeking to compare marginal improvements in supply-side problems, particularly in the form of estimated substitution ratios.     

Inside Front Cover: The Elastic Properties and Plastic Behavior of Two‐Dimensional Polymer Structures Fabricated by Laser Interference Lithography (Adv. Funct. Mater. 10/2006)

The probing of the micromechanical properties within a two‐dimensional polymer structure with sixfold symmetry fabricated via interference lithography reveals a nonuniform spatial distribution in the elastic modulus “imprinted” with an interference pattern in work reported by Tsukruk, Thomas, and co‐workers on p. 1324. The image prepared by M. Lemieux and T. Gorishnyy shows how the interference pattern is formed by three laser beams and is transferred to the solid polymer structure. The elastic and plastic properties within a two‐dimensional polymer (SU8) structure with sixfold symmetry fabricated via interference lithography are presented. There is a nonuniform spatial distribution in the elastic modulus, with a higher elastic modulus obtained for nodes (brightest regions in the laser interference pattern) and a lower elastic modulus for beams (darkest regions in the laser interference pattern) of the photopatterned films. We suggest that such a nonuniformity and unusual plastic behavior are related to the variable material properties “imprinted” by the interference pattern.     

The influence of oxygen partial pressure on growth of the (Hg,Re)-1223 intergrain junction

Hg/sub 0.82/Re/sub 0.18/Ba/sub 2/Ca/sub 2/Cu/sub 3/O/sub 8+/spl delta// polycrystalline samples were successfully obtained by using different oxygen partial pressure in the annealing treatment of the precursor ceramic. The doping state was confirmed by X-ray powder diffraction pattern analysis and by observing distinct thermopower values at room temperature. Also, the intergrain regions have shown an improvement in the critical current density when using the precursor preparation with 10% O/sub 2/ and 90% Ar (optimal doped). The optimal doped sample has presented the highest /spl alpha/ exponent of the J/sub c//spl prop/[1-(T/T/sub c/)/sup 2/]/sup /spl alpha// dependence. For the case of (Hg,Re)-1223 polycrystalline superconductor applications, the /spl alpha/ exponent can be used as a junction quality parameter.     

Design procedure of class-E amplifier for off-nominal operation at 50% duty ratio

Design equations for satisfying the off-nominal operating condition [i.e., only the zero-voltage switching (ZVS) condition] of the Class-E amplifier with a linear shunt capacitance at a duty ratio D=0.5 are derived. A new parameter s (V/s), called the slope of switch voltage when the switch turns on is introduced to obtain an image of the distance from the nominal conditions. By examining off-nominal Class-E operation degree of the design freedom of the Class-E amplifier increases by one. In addition various amplifier parameters such as operating frequency, output power, and load resistance range can be set as design specifications. For example, the peak switch voltage and switch current can be taken into account in the design procedure. Examples of a design procedure of the Class-E amplifier for off-nominal operation are given. The theoretical results were verified with PSpice simulation and experiments.     

A CMOS multichannel 10-Gb/s transceiver

We describe a CMOS multichannel transceiver that transmits and receives 10 Gb/s per channel over balanced copper media. The transceiver consists of two identical 10-Gb/s modules. Each module operates off a single 1.2-V supply and has a single 5-GHz phase-locked loop to supply a reference clock to two transmitter (Tx) channels and two receiver (Rx) channels. To track the input-signal phase, the Rx channel has a clock recovery unit (CRU), which uses a phase-interpolator-based timing generator and digital loop filter. The CRU can adjust the recovered clock phase with a resolution of 1.56 ps. Two sets of two-channel transceiver units were fabricated in 0.11-/spl mu/m CMOS on a single test chip. The transceiver unit size was 1.6 mm /spl times/ 2.6 mm. The Rx sensitivity was 120-mVp-p differential with a 70-ps phase margin for a common-mode voltage ranging from 0.6 to 1.0 V. The evaluated jitter tolerance curve met the OC-192 specification.