Tunable laser-based design and analysis for fractional lambda switches

Fractional lambda switching (FlambdaS) is a novel approach for traffic management over all-optical networks with sub-wavelength provisioning capability. The unique characteristic of FlambdaS is the utilization of UTC (coordinated universal time) for switching with minimum or no buffers. Several central research issues are still open in FlambdaS and need to be formally defined and analyzed. In this paper, we introduce three novel switch designs that are based on the use of tunable lasers (which can be replaced in the future with wavelength converters). First, the paper presents analytical results of scheduling feasibility, which measures the total number of possible different schedules for each switch design. Then it is shown that the architecture with the highest scheduling feasibility is strictly non blocking in the space domain. Next, the paper provides a closed form analysis of the blocking probability in the time domain, which is applicable for any strictly non-space blocking switch, using combinatorics. In addition, the paper provides measures of the switching hardware complexity, which, for the strictly non-blocking architecture, has the same switching complexity as Clos interconnection network, i.e., O(N'radic(N')) where N' is the number of optical channels.     

A stable dual-wavelength fiber laser with tunable wavelength spacing using a polarization-maintaining linear cavity

We propose and experimentally demonstrate a stable dual-wavelength erbium-doped polarization-maintaining (PM) fiber laser with tunable wavelength spacing using an all-PM linear cavity that makes use of two reflection peaks from the PM fiber Bragg grating (PM-FBG). Experimental results show stable dual lasing lines with a wavelength separation of ∼0.22 nm and a large optical signal-to-noise ratio (OSNR) of over 40 dB under room temperature. By applying axial strain to the PM-FBG, the center wavelengths of the two lasing lines can be tuned over several nanometers and the wavelength separation between the lasing lines can also be tuned to as small as 0.05 nm, which, to our knowledge, is the smallest wavelength spacing ever obtained from a stable room-temperature dual-wavelength fiber laser. The proposed laser configuration has the advantages of simple structure, low loss, stable dual-wavelength operation and a very small lasing linewidth of ∼5 kHz . PACS 42.55.Wd; 42.81.-i; 42.81.Gs     

Results from GRACE/SUSY at one-loop

We report the recent development on the SUSY calculations with the help of GRACE system. GRACE/SUSY/1LOOP is the computer code which can generate Feynman diagrams in the MSSM automatically and compute one-loop amplitudes in the numerical way. We present new results of various two-body decay widths and chargino pair production at ILC (international linear collider) at one-loop level.      

Single to 16-Channel Wavelength Conversion at 10 Gb/s Based on Cross-Gain Modulation of ASE Spectrum in SOA

A simple scheme for single to multi-channel wavelength conversion based on cross-gain modulation of amplified spontaneous emission (ASE) spectrum in semiconductor optical amplifier (SOA) is described. Single to 16-channel wavelength conversion at 10 Gb/s is first demonstrated without any additional probe lights, the modulation information carried by input signal could be converted into arbitrary many channels if only the demultiplexer with enough channels is exploited. Output performance and pattern effects are investigated experimentally.     

Tri-Gate Bulk MOSFET Design for CMOS Scaling to the End of the Roadmap

A tri-gate bulk MOSFET design utilizing a low-aspect-ratio channel is proposed to provide an evolutionary pathway for CMOS scaling to the end of the roadmap. 3-D device simulations indicate that this design offers the advantages of a multi-gate FET (reduced variability in performance and improved scalability) together with the advantages of a conventional planar MOSFET (low substrate cost and capability for dynamic threshold-voltage control).     

环境对MgB_2氧化过程中MgO晶须生长形状的影响

用扫描电镜研究了在 Mg B2 氧化过程中环境对 Mg O晶须生长形状的影响。仅有 Mg B2 时 ,在 80 0℃左右空气气氛中 ,可生长出纳米尺寸的 Mg O晶须。若把 Mg B2 添加到氧化铝陶瓷基体中 ,则生长成竹节状晶须。Mg O晶须生长形状的差别可能是由于氧浓度以及位错等因素造成的。     

A fast method to measure the thickness of removed layer from etching of SSNTD based on EDXRF

Solid state nuclear track detectors are commonly used for measurements of concentrations of radon gas and/or radon progeny. All these measurements depend critically on the thickness of the removed layer during etching. However, the thickness of removed layer calculated using the etching period does not necessarily provide a sufficiently accurate measure of the thickness. For example, the bulk etch rate depends on the strength of stirring during etching for the LR 115 detector. We propose here to measure the thickness of the removed layer by using energy-dispersive X-ray fluorescence spectrometry. In the present work, a reference silver nitrate pellet is placed beneath the LR 115 detector, and the fluorescence X-ray intensity for silver is then measured. We have found a linear relationship between the X-ray intensity and the thickness of the removed layer for LR 115 detector. This provides a fast method to measure the thickness of removed layer from etching of LR 115 detector. However, this method was found to be inapplicable for the CR-39 detector. Therefore, alternative methods have yet to be explored for the CR-39 detector.     

Mid-infrared generation based on a periodically poled LiNbO3 optical parametric oscillator

We report a nanosecond Nd:YVO_4-pumped optical parametric oscillator (OPO) based on periodically poled LiNbO_3 (PPLN). Tuning is achieved in this experiment by varying the temperature and period of the PPLN. The design of double-pass singly resonant oscillator (DSRO) and confocal cavity enables the OPO threshold to be lowered considerably, resulting in a simple, compact, all-solid-state configuration with the mid-infrared idler powers of up to 466mW at 3.41μm.     

Development of Stretch Solder Interconnections for Wafer Level Packaging

A wafer level packaging technique has been developed with an inherent advantage of good solder joint co-planarity suitable for wafer level testing. A suitable weak metallization scheme has also been established for the detachment process. During the fabrication process, the compliancy of the solder joint is enhanced through stretching to achieve a small shape factor. Thermal cycling reliability of these hourglass-shaped, stretch solder interconnections has been found to be considerably better than that of the conventional spherical-shaped solder bumps.