Ecodesigns and applications for noble metal nanoparticles by ultrasound process

Ecodesigns for nano-sized noble metal particles were investigated by a new liquid-solid (metal oxide-alcohol) system. We have reduced noble metal oxides as low-emission starting materials by ultrasound and tried to fabricate various noble metal nanoparticles (Ag, Au, Pt, Pd) at room temperature, Noble metal oxides were investigated during decomposition. These reductions are ecologically clean, because many noble metal oxides are not toxic, and during decomposition, O/sub 2/ is evolved. By choosing suitable conditions, it is reasonable to expect that this simple sonochemical process can be extended to obtain nano-sized metal particles.     

iShopFloor: an Internet-enabled agent-based intelligent shop floor

Global competition is driving manufacturing companies to change the way they do business. New kinds of shop floor control systems need to be implemented for these companies to respond quickly to changing shop floor environments and customer demands. This paper presents a new concept called iShopFloor-an intelligent shop floor based on the Internet, web, and agent technologies. It focuses on the implementation of distributed intelligence in the manufacturing shop floor. The proposed approach provides the framework for components of a complex control system to work together as a whole rather than as a disjoint set. It encompasses both information architecture and integration methodologies. The paper introduces the basic concept of iShopFloor, a generic system architecture, and system components. It also describes the implementation of eXtensible Markup Language message services in iShopFloor and the application of intelligent agents to distributed manufacturing scheduling. A prototype environment is presented, and some implementation issues are discussed.     

Dielectric reliability of stacked Al2O3–HfO2 MIS capacitors with cylinder type for improving DRAM data retention characteristics

Dielectric reliability in Al₂O₃(2–3.1nm)–HfO₂(3nm) stack capacitor with Metal–Insulator–Si(MIS) structure is investigated in this paper. We propose an optimized capacitor process through the Time–Dependent Dielectric Breakdown (TDDB) data under various process conditions. Furthermore, due to asymmetric current at both negative and positive voltage stress polarities, we show different lifetime extrapolation by a fluence–driven model. As a result, the maximum allowed operating voltage is projected to be 1.7V (failure rate 10ppm during 10year @ 85°C) for Data “0” retention lifetime.     

On maximum-length linear congruential-sequences-based low-density parity-check codes

This letter extends a low-density parity-check code construction using maximum-length linear congruential sequences by Prabhakar and Narayanan. The corresponding bipartite graphs of their construction were guaranteed to have a girth larger than four by a sufficient condition. However, their sufficient condition was limited to regular codes and data-node degree equal to three. The extension in this letter allows arbitrary data-node degrees and is applicable to irregular codes. Further, simpler sufficient conditions are derived and larger girths are addressed.     

Wideband and compact folded loop antenna

A simple and successful design method that yields a wideband and compact antenna without a ground plane is proposed. The antenna, referred to as the folded loop antenna, can, with the right parameters, achieve wideband characteristics. Calculated and measured results agree well and more than 50% bandwidth (return loss /spl les/-10 dB) is obtained.     

Spectrum efficient region-based resource allocation with fractional loading for FH-OFDMA cellular systems

A practical resource management method that can significantly reduce cochannel interference (CCI) and improve spectrum utilisation in FH-OFDMA packet-based cellular networks is presented. The proposed method seeks an effective combination of dynamic resource allocation with fractional coding and bit loading to respectively minimise CCI and maximise system throughput for a desired performance.     

An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs

A decoupling circuit using an operational amplifier is proposed to suppress substrate crosstalk in mixed-signal system-on-chip (SoC) devices. It overcomes the parasitic inductance problem of on-chip capacitor decoupling. The effect of the proposed decoupling circuit is not limited by parasitic fine impedance. A 0.13-/spl mu/m CMOS test chip showed that substrate noise at frequencies from 40 MHz to 1 GHz was incrementally suppressed by sequentially activating three of the proposed circuits in parallel. The power dissipation of each circuit was 3.3 mW at a 1.0-V power supply. The test chip measurement showed that the proposed decoupling reduced crosstalk by 31% at 200 MHz, whereas it was reduced by 4.4% with capacitor decoupling. This 7:1 ratio, or 17 dB, corresponds to the gain of the opamp. Design of the opamp and its feedback loop for active decoupling is simple, making the opamp useful for SoC applications.     

Construction algorithms for polynomial lattice rules for multivariate integration

We introduce a new construction algorithm for digital nets for integration in certain weighted tensor product Hilbert spaces. The first weighted Hilbert space we consider is based on Walsh functions. Dick and Pillichshammer calculated the worst-case error for integration using digital nets for this space. Here we extend this result to a special construction method for digital nets based on polynomials over finite fields. This result allows us to find polynomials which yield a small worst-case error by computer search. We prove an upper bound on the worst-case error for digital nets obtained by such a search algorithm which shows that the convergence rate is best possible and that strong tractability holds under some condition on the weights.

We extend the results for the weighted Hilbert space based on Walsh functions to weighted Sobolev spaces. In this case we use randomly digitally shifted digital nets. The construction principle is the same as before, only the worst-case error is slightly different. Again digital nets obtained from our search algorithm yield a worst-case error achieving the optimal rate of convergence and as before strong tractability holds under some condition on the weights. These results show that such a construction of digital nets yields the until now best known results of this kind and that our construction methods are comparable to the construction methods known for lattice rules.

We conclude the article with numerical results comparing the expected worst-case error for randomly digitally shifted digital nets with those for randomly shifted lattice rules.

     

W-band divide-by-3 frequency divider using 0.1 /spl mu/m InAlAs/InGaAs metamorphic HEMT technology

A W-band divide-by-3 frequency divider with wide bandwidth and low power dissipation is presented using harmonic injection-locking technique. A cascode FET is employed for a self-oscillating second-harmonic mixer which is injection-locked by third-harmonic input to obtain the division order of three. The fabricated frequency divider using 0.1 /spl mu/m GaAs metamorphic HEMT technology shows superior performance such as large bandwidth of 6.1 GHz around 83.1 GHz (7.3%) under small DC power consumption of 12 mW.