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81.
Although the most important use of nuclear magnetic resonance imaging (MRI) continues to be for diagnostic medicine, recognition is being gained for many nonmedical applications. Examples include the following areas: petrogeology, food, agriculture, polymers and polymer-composites, and pharmaceuticals. These areas all involve studies of species that have short spin-spin relaxation times, and consequently need far fast gradient switching. These technical details are discussed and typical applications given.  相似文献   
82.
In this paper we construct a primitive, non-symmetric 3-class association scheme with parameters v = 36, v1 = 7, p111 = 0 and p211 = 4 and show that such a scheme is determined by its parameters.  相似文献   
83.
TheSU(2) rotation matricesD (j), specified in terms of axis and angle of rotation, are expressed as linear combination of normalized irreducible tensorial matricces (NITM) of rankl = 0 to 2j rotated to the polar angles of the axis. The rotated NITM are constructed from spherical harmonics of the same rank. Since this formulation requires no matrix products, it may be computationally more efficient than Euler angle formulas, particularly for largej. Rotated NITM and formulas for theD (j) withj = 1/2 andj = 1 are written out explicitly. A formula for the structure constants of the products of conformable NITM is also given in terms of 3-j and 6-j symbols.  相似文献   
84.
Silver nitrate-acetonitrile and π iodine-benzene complexes in thermotropic liquid crystals have been studied by 1H, 2H, and 13C NMR spectroscopy and by optical microscopy. Evidence for at least two silver complexes in each liquid crystal is presented.  相似文献   
85.
In this paper, we present efficient VLSI architectures for full-search block-matching motion estimation (BMME) algorithm. Given a search range, we partition it into sub-search arrays called tiles. By fully exploiting data dependency within a tile, efficient VLSI architectures can be obtained. Using the proposed VLSI architectures, all the block-matchings in a tile can be processed in parallel. All the tiles within a search range can be processed serially or concurrently depending on various requirements. With the consideration of processing speed, hardware cost, and I/O bandwidth, the optimal tile size for a specific video application is analyzed. By partitioning a search range into tiles with appropriate size, flexible VLSI designs with different throughput can be obtained. In this way, cost effective VLSI designs for a wide range of video applications, from H.261 to HDTV, can be achieved.  相似文献   
86.
We consider the problem of allocating bandwidth fairly to each node in a shared, unidirectional bus network. We focus on the pi persistent protocol, since these are open loop policies designed to operate well in high speed networks, which have a very large bandwidth-delay product and feedback in the upstream direction is not available in a timely manner. First, we introduce an improvement to the basic pi persistent protocol, in which we replace random coin tosses with a deterministic counting algorithm, and thereby reduce the delays for all nodes for any given choice of {pi}. We then describe an exact method for calculating average packet delays and queue lengths in both the pi persistent and our new deterministic n out of m protocols, based on the regenerative approach of Georgiades et al. (1987). These delay results, together with simulation measurements, show that both of these protocols still waste some bandwidth. After presenting a lower bounding argument to show that some wasted bandwidth is inevitable in all such distributed access control schemes, assuming a passive bus without feedback in the upstream direction, we show that changing the bus to unidirectional point-to-point links between (very simple) active interfaces at each node allows us to construct distributed access schemes that require no upstream feedback and are both work conserving and fair. To illustrate how this can be done, we introduce the pi preemptive protocol, in which each node randomly inserts its own packets into the traffic arriving from upstream. We derive a simple and effective heuristic for calculating the preemption probability for each node, and use simulation to show how well it equalizes the delays at each node  相似文献   
87.
The authors describe and discuss the new technique, multistep adaptive flux interpolation (MAFI), and its application to image data for coding. When applied to an image, MAFI produces an output which is also in an image form, but which has a more uniform feature density and a greatly reduced size. MAFI warps the input image by removing those rows and columns which contain a majority of redundant pixels. The side information required for reconstruction is minimal, and the image can be further compressed using conventional coders, making the compression ratio even higher. Because of its warped nature, the MAFI output's statistics are also more consistent with the properties assumed by block-based discrete cosine transform (DCT) methods  相似文献   
88.
We study a generalization of the notion of the chromatic number of a graph in which the colors assigned to adjacent vertices are required to be, in a certain sense, far apart. © 1993 John Wiley & Sons, Inc.  相似文献   
89.
This paper describes new techniques for the simulation and power distribution synthesis of mixed analog/digital integrated circuits considering the parasitic coupling of noise through the common substrate. By spatially discretizing a simplified form of Maxwell's equations, a three-dimensional linear mesh model of the substrate is developed. For simulation, a macromodel of the fine substrate mesh is formulated and a modified version of SPICE3 is used to simulate the electrical circuit coupled with the macromodel. For synthesis, a coarse substrate mesh, and interconnect models are used to couple linear macromodels of circuit functional blocks. Asymptotic Waveform Evaluation (AWE) is used to evaluate the electrical behavior of the network at every iteration in the synthesis process. Macromodel simulations are significantly faster than device level simulations and compare accurately to measured results. Synthesis results demonstrate the critical need to constrain substrate noise and simultaneously optimize power bus geometry and pad assignment to meet performance targets  相似文献   
90.
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