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51.
We derive hydrodynamic equations describing the evolution of a binary fluid segregated into two regions, each rich in one species,which are separated (on the macroscopic scale) by a sharp interface. Our starting point is a Vlasov-Boltzmann (VB) equation describing the evolution of the one particle position and velocity distributions, fi (x, v, t), i = 1, 2. The solution of the VB equation is developed in a Hilbert expansion appropriate for this system. This yields incompressible Navier-Stokes equations for the velocity field u and a jump boundary condition for the pressure across the interface. The interface, in turn, moves with a velocity given by the normal component of u.  相似文献   
52.
53.
Solvent extraction of europium (III), zinc (II) cobalt (II) with α-acyl-d-camphor and optically active isomers of quinine and quinidine was studied in order to obtain information on chirality recognition based on adduct formation between a chiral metal chelate and optically active isomers. It was possible to differentiate clearly between the adduct formation of quinine and that of quinidine in the synergic extraction of cobalt and europium with 3-heptafluorobutyryl- d-camphor and cobalt with 3-trifluoroacetyl-d-camphor.  相似文献   
54.
Direct product rings have received relatively little attention, perhaps because they are sometimes labeled “trivial” [8, p.6]. Nevertheless, the 2-dimensional direct product ring of the reals, when expressed in the “hyperbolic basis”, is analogous in many ways to the system of complex numbers and also has a physical interpretation. This prompted an exploratory foray into the world ofn-dimensional direct product rings of the reals to see how much can be extended from the 2-dimensional case (see, e.g. [3,4,5]). Section 1 provides algebraic notation, up to the point of defining polar coordinates. Section 2 uses analysis to explore differentiability and conformality.  相似文献   
55.
The effects of static, alternating and dynamic stress conditions on the degradation rate of 0.8μm n- and p-channel LDD MOS transistors have systematically been investigated and compared. The shifts of the threshold voltage, transconductance, linear drain current and charge pumping current were used to monitor the transistor degradation. The results suggest that the aging induced by a dynamic stress cannot be directly explained with static stress models, essentially because it is highly dependent on a larger number of parameters (biases and durations of the top and bottom levels of the pulses, transient times). The correlation of static and dynamic stresses also clarifies the degradation mechanisms, in particular the role of hot holes in the generation of interface states.  相似文献   
56.
JPC – Journal of Planar Chromatography – Modern TLC - Modeling of thin-layer chromatographic separation of androstane isomers to find the optimum mobile phase is described in this...  相似文献   
57.
For a special class of two-person zero-sum infinitely repeated stochastic games with incomplete information, we prove the existence of the maxmin, minmax and limΝ n . However the value may not exist and moreover maxmin and limΝ n may be transcendental functions.  相似文献   
58.
The polarization states in a figure and laser are analyzed using Jones matrices. The analysis shows that a figure-8 laser in CW operation does not give enough information to allow the optimization of the birefringence for mode-locking. A switchable nonreciprocal phase shifter is proposed to provide a simple way to optimize the birefringence for a mode-locked figure-8 laser. Using this device, the mode-locking of a diode-pumped figure-8 laser was started, with a probability better than 99%, by following a sequence of predetermined mechanical adjustment. With the proposed nonreciprocal phase shifter, the optimization and starting of a figure-8 laser can easily be automated  相似文献   
59.
Given an information structure a function that measures how the inferences made by the agents spread among the states is defined; it specifies for each event its impact at each state, for each agent. Several properties are established. Received November 1994/Revised version September 1996  相似文献   
60.
This paper presents a TriMedia processor extended with an IDCT reconfigurable design, and assesses the performance gain such an extension has when performing MPEG-2 decoding. We first propose the skeleton of an extension of the TriMedia architecture, which consists of a Field-Programmable Gate Array (FPGA)-based Reconfigurable Functional Unit (RFU), a Configuration Unit managing the reconfiguration of the RFU, and their associated instructions. Then, we address the computation of the 8 × 8 (2-D) IDCT on such extended TriMedia and propose a scheme to implement the 1-D IDCT operation on the RFU. When mapped on an ACEX EP1K100 FPGA from Altera, the proposed 1-D IDCT exhibits a latency of 16 and a recovery of 2 TriMedia@200 MHz cycles, and occupies 45% of the logic cells of the device. By configuring the 1-D IDCT on the RFU at application launch-time, the IEEE-compliant 2-D IDCT can be computed with the throughput of 1/32 IDCT/cycle. This figure translates to an improvement over the standard TriMedia of more than 40% in terms of computing time when 2-D IDCT is carried out in the framework of MPEG-2 decoding. Finally, the proposed reconfigurable IDCT is compared to a number of existing designs.Mihai Sima was born in Bucharest, Romania. He received the MS degree in Electrical Engineering from Politehnica University of Bucharest, and the Ph.D. degree in Electrical Engineering from Delft University of Technology, The Netherlands. He had been with the Microelectronics Company in Bucharest for 3 years, where he was involved in instrumentation electronics for integrated circuit testing. Subsequently, he joined the Telecommunications Department of Politehnica University of Bucharest, where he had been involved in digital signal processing and speech recognition for 6 years. More recently, he had been with the Faculty of Electrical Engineering, Mathematics, and Computer Science, Delft University of Technology, where he worked on reconfigurable architectures for mediaprocessing domain. He is currently an assistant professor with the Department of Electrical and Computer Engineering, University of Victoria, B.C., Canada. His research interests include computer architecture, reconfigurable computing, embedded systems, digital signal processing, and speech recognition.Sorin D. Coofan was born in Mizil, Romania. He received the MS degree in Computer Science from the Politehnica University of Bucharest, Romania, and the Ph.D. degree in Electrical Engineering from Delft University of Technology, The Netherlands. He had worked with the Research & Development Institute for Electronic Components (ICCE) in Bucharest for a decade, being involved in structured design of digital systems, design rule checking of ICs layout, logic and mixed-mode simulation of electronic circuits, testability analysis, and image processing. He is currently an associate professor with the Faculty of Electrical Engineering, Mathematics, and Computer Science, Delft University of Technology, The Netherlands. His research interests include computer arithmetic, parallel architectures, embedded systems, reconfigurable computing, nano-electronics, neural networks, computational geometry, and computer aided design.Jos T.J. van Eijndhoven was born in Roosendaal, The Netherlands. He studied Electrical Engineering at the Eindhoven University of Technology, The Netherlands, obtaining the M.Sc. and Ph.D. degrees in 1981 and 1984, respectively, for a work on piecewise linear circuit simulation. Then, he became a senior research member in the design automation group of the Eindhoven University of Technology. In 1986 he spent a sabbatical period at the IBM Thomas J. Watson Research Laboratory, Yorktown Heights, New York, for research on high level synthesis. In 1998 he joined Philips Research Laboratories in Eindhoven, The Netherlands, to work on the architectural design of programmable multimedia hardware and the associated mapping of media processing applications.Stamatis Vassiliadis was born in Manolates, Samos, Greece. He is a professor with the Faculty of Electrical Engineering, Mathematics, and Computer Science, Delft University of Technology, The Netherlands. He has also served in the faculties of Cornell University, Ithaca, NY, and the State University of New York (S.U.N.Y.), Binghamton, NY.He hadworked for a decade with IBM in the AdvancedWorkstations and Systems laboratory in Austin TX, the Mid-Hudson Valley Laboratory in Poughkeepsie, NY, and the Glendale Laboratory in Endicott, NY. In IBM he was involved in a number of projects regarding computer design, organizations, and architectures and the leadership to advanced research projects. A number of his design and implementation proposals have been implemented in commerciallyavailable systems and processors including the IBM 9370 model 60 computer system, the IBM POWER II, the IBM AS/400 Models 400, 500, and 510, Server Models 40S and 50S, the IBM AS/400 Advanced 36, and the IBM S/390 G4 and G5 computer systems. For his work, he received numerous awards including 23 levels of Publication Achievement Awards, 15 levels of Invention Achievement Awards and an Outstanding Innovation Award for Engineering/Scientific Hardware Design in 1989. In 1990 he has been awarded the highest number of USA patents in IBM, six of his 70 USA patents being rated with the highest patent ranking in IBM.Kees A. Vissers graduated the Delft University of Technology, receiving his M.Sc. in 1980. He started directly with Philips Research Laboratories in Eindhoven where he was involved in highlevel simulation and high-level synthesis. He had been heading the research on hardware/software co-design and system level design for many years, and had a significant contribution to the TriMedia VLIW processor. From 1987 till 1988 he was a visiting researcher at Carnegie Mellon University, Pittsburgh, Pennsylvania, with the group of Don Thomas. He is currently a Research Fellow with University of California at Berkeley, Department of Electrical Engineering and Computer Sciences. His research interests include video processing, embedded media processing systems, and reconfigurable computing.  相似文献   
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