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61.
Dongwook Lee Kiseon Kim 《Electronics letters》1998,34(15):1474-1476
The authors suggest a novel virtual circuit connection method based on the reverse traversing technique to minimise the waste of network bandwidth resources, when the Internet protocol multicast is interoperated using the resource reservation protocol over an asynchronous transfer mode network. Simulation results show that, as the number of receivers increases, the bandwidth requirements on all links of the network of the proposed scheme become more advantageous than those of other conventional methods 相似文献
62.
Kyeongho Lee Yeshik Shin Sungjoon Kim Deog-Kyoon Jeong Kim G. Kim B. Da Costa V. 《Solid-State Circuits, IEEE Journal of》1998,33(5):816-823
In a high-resolution flat panel system, a conventional interface that directly connects a liquid crystal display (LCD) controller to a flat panel cannot overcome the problems of excess EMI (electromagnetic interference) and power caused by full-swing transmission signals in parallel lines. This paper presents a high-speed digital video interface system implemented with a low-cost standard CMOS (complimentary metal-oxide-semiconductor) technology that can mitigate EMI and power problems in high-resolution flat panel display systems. The combined architecture of the high-speed, small number of parallel lines and low-voltage swing serial interface can support resolutions from VGA (640×480 pixels) up to XGA (1024×768 pixels) with significant power improvement and drastic EMI reduction. To support high-speed, low-voltage swing signaling and overcome channel-to-channel skew problems, a robust data recovery system is required. The proposed digital phase-locked loop enables robust skew-insensitive data recovery of up to 1.04 GBd 相似文献
63.
Hulfachor R.B. Ellis-Monaghan J.J. Kim K.W. Littlejohn M.A. 《Electron Devices, IEEE Transactions on》1996,43(4):661-663
A comprehensive Monte Carlo simulator is employed to investigate nonlocal carrier transport in 0.1 μm n-MOSFET's under low-voltage stress. Specifically, the role of electron-electron (e-e) interactions on hot electron injection is explored for two emerging device designs biased at a drain voltage Vd considerably less than the Si/SiO2 injection barrier height φb. Simulation of both devices reveal that 1) although qVd<φb, carriers can obtain energies greater than φb, and 2) the peak for electron injection is displaced approximately 20 nm beyond the peak in the parallel channel electric field. These phenomena constitute a spatial retardation of carrier heating that is strongly influenced by e-e interactions near the drain edge. (Virtually no injection is observed in our simulations when e-e scattering is not considered.) Simulations also show that an aggressive design based on larger dopant atoms, steeper doping gradients, and a self-aligned junction counter-doping process produces a higher peak in the channel electric field, a hotter carrier energy distribution, and a greater total electron injection rate into the oxide when compared to a more conventionally-doped design. The impact of spatially retarded carrier heating on hot-electron-induced device degradation is further examined by coupling an interface state distribution obtained from Monte Carlo simulations with a drift-diffusion simulator. Because of retarded carrier heating, the interface states are mainly generated further over the drain region where interface charge produces minimal degradation. Thus, surprisingly, both 0.1 μm n-MOSFET designs exhibit comparable drain current degradation rates 相似文献
64.
J. S. Kim D. G. Seiler R. A. Lancaster M. B. Reine 《Journal of Electronic Materials》1996,25(8):1215-1220
Variable-magnetic-field Hall measurements (0 to 1.5 T) are performed on very-narrow-gap bulk-grown Hg1−xCdxTe single crystals (0.165 ≤ x ≤ 0.2) at various temperatures (10 to 300K). The electron densities and mobilities are obtained
within the one-carrier (electrons) approximation of the reduced-con-ductivity-tensor scheme. The present data together with
the selected data set reported by other workers exhibit a pronounced peak when the electron mobility is plotted against the
alloy composition x-value which has been predicted to be due to the effective-mass minimum at the bandgap-crossing (Eg ≈ 0). The observed position (x ≈ 0.165), height (≈4 x 102 m2Vs), and width (≈0.01 in x) of the mobility-peak can be explained by a simple simulation involving only ionized-impurity scattering.
A lower bound of the effective mass is introduced as a fitting parameter to be consistent with the finiteness of the observed
electron mobility and is found to be of the order of 10−4 of the mass of a free electron. 相似文献
65.
M. S. Han S. R. Hahn H. C. Kwon Y. Bin T. W. Kang J. H. Leem Y. B. Hou H. C. Jeon J. K. Hyun Y. T. Jeoung H. K. Kim J. M. Kim T. W. Kim 《Journal of Electronic Materials》1998,27(6):680-683
Double-crystal x-ray rocking curve (DCRC) and secondary-ion mass-spectroscopy (SIMS) measurements have been performed to investigate the effect of rapid thermal annealing on the interdiffusion behavior of Hg in HgTe/CdTe superlattices grown on Cd0.96Zn0.04Te (211)B substrates by molecular beam epitaxy. The sharp satellite peaks of the DCRC measurements on a 100-period HgTe/CdTe (100Å/100Å) superlattice show a periodic arrangement of the superlattice with high-quality interfaces. The negative direction of the entropy change obtained from the diffusion coefficients as a function of the reciprocal of the temperature after RTA indicates that the Hg diffusion for the annealed HgTe/CdTe superlattice is caused by an interstitial mechanism. The Cd and the Hg concentration profiles near the annealed HgTe/CdTe superlattice interfaces, as measured by SIMS, show a nonlinear behavior for Hg, originating from the interstitial diffusion mechanism of the Hg composition. These results indicate that a nonlinear interdiffusion behavior is dominant for HgTe/CdTe superlattices annealed at 190°C and that the rectangular shape of HgTe/CdTe superlattices may change to a parabolic shape because of the intermixing of Hg and Cd due to the thermal treatment. 相似文献
66.
This research extends previous work with dynamic models to manage groundwater quality by using the consumptive nitrate use rate instead of the nitrate application rate. The analysis indicates that misspecification results in overestimation of economic benefits, and supra-optimum nitrogen fertilizer application rates and groundwater nitrate stocks at a steady state. 相似文献
67.
A family of infinite measure preserving odometers is presented which exhibit examples ofp-recurrent but notp+1-recurrent ergodic transformations for everyp>1. 相似文献
68.
Yong Nam Choi Shin Ae Kim Sung Kyu Kim Sung Baek Kim Chang-Hee Lee Pavel Mikula 《Pramana》2004,63(1):175-181
In a conventional diffractometer having single monochromator, only one position, parallel position, is used for the diffraction
experiment (i.e. detection) because the resolution property of the other one, anti-parallel position, is very poor. However,
a bent perfect crystal (BPC) monochromator at monochromatic focusing condition can provide a quite flat and equal resolution
property at both parallel and anti-parallel positions and thus one can have a chance to use both sides for the diffraction
experiment. From the data of the FWHM and the Δd/d measured on three diffraction geometries (symmetric, asymmetric compression and asymmetric expansion), we can conclude that
the simultaneous diffraction measurement in both parallel and anti-parallel positions can be achieved. 相似文献
69.
McIntyre H. Wendell D. Lin K.J. Kaushik P. Seshadri S. Wang A. Sundararaman V. Ping Wang Song Kim Hsu W.-J. Hee-Choul Park Levinsky G. Jiejun Lu Chirania M. Heald R. Lazar P. Dharmasena S. 《Solid-State Circuits, IEEE Journal of》2005,40(1):52-59
A 4-MB L2 data cache was implemented for a 64-bit 1.6-GHz SPARC(r) RISC microprocessor. Static sense amplifiers were used in the SRAM arrays and for global data repeaters, resulting in robust and flexible timing operation. Elimination of the global clock grid over the SRAM array saves power, enabled by combining the clock information with array select signals. Redundancy was implemented flexibly, with shift circuits outside the main data array for area efficiency. The chip integrates 315 million transistors and uses an 8-metal-layer 90-nm CMOS process. 相似文献
70.
The single fundamental mode output power of photonic crystal vertical cavity lasers is improved by varying sizes of oxide apertures and defect lasing apertures. A maximum output power of 3.1 mW in the fundamental mode has been achieved with a new fabrication process that involves only focused ion beam etching to create holes in selectively oxidised VCSELs. 相似文献