Study of period number effect in the superlattice infrared photodetector

Superlattices have been demonstrated previously by our group in the design of the multicolor infrared photodetector. In general, the period number of the superlattice may be up to several dozens. In this paper, we have investigated the performance of the infrared photodetectors especially with 3, 5 and 15 periods. The detector structure contains a thick blocking barrier embedded between two superlattices with different period numbers but with the same well and barrier widths. This double-superlattice structure shows switchable spectral responses between two spectral regions by the voltage polarities. The photoresponse in each spectral region is also tunable by the magnitude of the applied voltage. The voltage-dependent behavior reveals the photoelectron relaxation and transport mechanism in the superlattice miniband. Superlattice with few periods has high electron group velocity, less relaxation effect and less collection efficiency. Therefore the superlattice with few periods may have better responsivity and narrower photoresponse range than the one with many periods. Based on the experimental results of our devices, it is observed that the superlattice with fewer periods has better detectivity, responsivity, wider range of the operational temperature, and more flexible miniband engineering than the conventional multiple quantum well infrared photodetector.     

Foveation-Based Error Resilience and Unequal Error Protection over Mobile Networks

By exploiting new human-machine interface techniques, such as visual eyetrackers, it should be possible to develop more efficient visual multimedia services associated with low bandwidth, dynamic channel adaptation and robust visual data transmission. In this paper, we introduce foveation-based error resilience and unequal error protection techniques over highly error-prone mobile networks. Each frame is spatially divided into foveated and background layers according to perceptual importance. Perceptual importance is determined either through an eye tracker or by manually selecting a region of interest. We attempt to improve reconstructed visual quality by maintaining the high visual source throughput of the foveated layer using foveation-based error resilience and error correction using a combination of turbo codes and ARQ (automatic reQuest). In order to alleviate the degradation of visual quality, a foveation based bitstream partitioning is developed. In an effort to increase the source throughput of the foveated layer, we develop unequal delay-constrained ARQ (automatic reQuest) and rate compatible punctured turbo codes where the punctual pattern of RCPC (rate compatible punctured convolutional) codes in H.223 Annex C is used. In the simulation, the visual quality is significantly increased in the area of interest using foveation-based error resilience and unequal error protection; (as much as 3 dB FPSNR (foveal peak signal to noise ratio) improvement) at 40% packet error rate. Over real-fading statistics measured in the downtown area of Austin, Texas, the visual quality is increased up to 1.5 dB in PSNR and 1.8 dB in FPSNR at a channel SNR of 5 dB.     

At least N+1 finite transmission zeros using frequency-variant negative source-load coupling

A second-order cross-coupled combline filter which has three finite transmission zeros is presented. The problem of the frequency-invariant coupling in a real circuit is introduced. To make extra transmission zeros, a top metalized dielectric block is used.     

多粒度全光网中的多层联合路由

多粒度交换技术利用波带级路由以及光纤级路由,可有效降低光交叉连接器的复杂度.但多粒度交换增加了光网络的逻辑层次结构,使得网络中的路由与资源分配问题更为复杂,因此,在多粒度全光网中实现多层联合路由是提高网络性能的关键.本文对多粒度交叉连接结构进行了分析,并对多粒度全光网中的多层联合路由问题进行了研究.     

Bias-temperature instabilities of polysilicon gate HfO/sub 2/ MOSFETs

Bias-temperature instabilities (BTI) of HfO/sub 2/ metal oxide semiconductor field effect transistors (MOSFETs) have been systematically studied for the first time. NMOS positive BTI (PBTI) exhibited a more significant V/sub t/ instability than that of PMOS negative BTI (NBTI), and limited the lifetime of HfO/sub 2/ MOSFETs. Although high-temperature forming gas annealing (HT-FGA) improved the interface quality by passivating the interfacial states with hydrogen, BTI behaviors were not strongly affected by the technique. Charge pumping measurements were extensively used to investigate the nature of the BTI degradation, and it was found that V/sub t/ degradation of NMOS PBTI was primarily caused by charge trapping in bulk HfO/sub 2/ rather than interfacial degradation. Deuterium (D/sub 2/) annealing was found to be an excellent technique to improve BTI immunity as well as to enhance the mobility of HfO/sub 2/ MOSFETs.     

Investigations of high-performance GaAs solar cells grown on Ge-Si/sub 1-x/Ge/sub x/-Si substrates

High-performance p/sup +//n GaAs solar cells were grown and processed on compositionally graded Ge-Si/sub 1-x/Ge/sub x/-Si (SiGe) substrates. Total area efficiencies of 18.1% under the AM1.5-G spectrum were measured for 0.0444 cm/sup 2/ solar cells. This high efficiency is attributed to the very high open-circuit voltages (980 mV (AM0) and 973 mV (AM1.5-G)) that were achieved by the reduction in threading dislocation density enabled by the SiGe buffers, and thus reduced carrier recombination losses. This is the highest independently confirmed efficiency and open-circuit voltage for a GaAs solar cell grown on a Si-based substrate to date. Larger area solar cells were also studied in order to examine the impact of device area on GaAs-on-SiGe solar cell performance; we found that an increase in device area from 0.36 to 4.0 cm/sup 2/ did not degrade the measured performance characteristics for cells processed on identical substrates. Moreover, the device performance uniformity for large area heteroepitaxial cells is consistent with that of homoepitaxial cells; thus, device growth and processing on SiGe substrates did not introduce added performance variations. These results demonstrate that using SiGe interlayers to produce "virtual" Ge substrates may provide a robust method for scaleable integration of high performance III-V photovoltaics devices with large area Si wafers.     

Surface-mount dual-loop antenna for 2.4/5 GHz WLAN operation

A surface-mount dual-loop antenna suitable for dual-frequency WLAN operation is presented. For achieving dual-frequency operation with a compact size, the antenna comprises two loop strips of different sizes printed on a flexible printed circuit board, which is then bent and attached onto a foam base of compact size. The antenna shows an attractive feature of high antenna gain, about 4 and 5 dBi for frequencies across the 2.4 and 5 GHz WLAN bands, respectively.     

Design of Millimeter Wave TFMS Bandpass Filter

In this paper, a Ka-band thin film microstrip line(TFMS) filter with multi-layer structure on silicon substrate is introduced. The simulated results show that it is possible to design compact millimeter-wave filter on silicon substrate with process compatible to current VLSI technology.