A facile synthesis of benzo[b][1,4]thiazepine derivatives by palladium acetate catalyzed reaction

The preparation of steroid/nonsteroid fused benzo[b][1,4]thiazepines and 2-arylsubstituted benzo[b][1,4]thiazepines is described from Pd(OAc)₂ catalyzed reaction of steroidal/nonsteroidal β-halovinyl aldehydes and 2-aminothiophenols in DMF under heating condition.     

Constrained moving least‐squares immersed boundary method for fluid‐structure interaction analysis

A numerical method is presented for the analysis of interactions of inviscid and compressible flows with arbitrarily shaped stationary or moving rigid solids. The fluid equations are solved on a fixed rectangular Cartesian grid by using a higher‐order finite difference method based on the fifth‐order WENO scheme. A constrained moving least‐squares sharp interface method is proposed to enforce the Neumann‐type boundary conditions on the fluid‐solid interface by using a penalty term, while the Dirichlet boundary conditions are directly enforced. The solution of the fluid flow and the solid motion equations is advanced in time by staggerly using, respectively, the third‐order Runge‐Kutta and the implicit Newmark integration schemes. The stability and the robustness of the proposed method have been demonstrated by analyzing 5 challenging problems. For these problems, the numerical results have been found to agree well with their analytical and numerical solutions available in the literature. Effects of the support domain size and values assigned to the penalty parameter on the stability and the accuracy of the present method are also discussed.     

On chip novel video streaming system for bi-network multicasting protocols

In the past three decades, tremendous Ethernet-related research has been done, which has led to today's ubiquitous Ethernet technology. On the other hand, with the emergence of new network needs, a new protocol, the IEEE 1394 standard serial bus (or Firewire) was introduced. Firewire is suitable for high-quality audio/video applications which do not perform well in the best-effort-based Ethernet technology. However, since Firewire is a serial bus, it has harsh cable length limitations as compared to Ethernet capabilities.In this paper, we present a novel on-chip system that receives Firewire video and transmits it in multicast mode using Ethernet protocol. A major advantage of this novel system is to utilize the existing Ethernet infrastructure to extend the range of Firewire video streaming to reach remote nodes and make it even accessible to nodes with a single Ethernet interface. This will have tremendous impact on Firewire applications such as deploying Firewire cameras in big-scale security-sensitive buildings or industrial facilities with image-based remote quality control.This novel chip utilizes the concept of Ethernet multicasting transmission mode for video streaming. The proposed chip design converts the IEEE 1394 isochronous traffic to the Ethernet multicast frame format via two off-chip asynchronous write and read buffers.The goal of this research is to design an On Chip Novel Video Streaming System that avoids performance bottlenecks in the software protocol conversion of these two important network protocols. The author decided to study these two networks because of their broad use and cable power provisioning capabilities. The novel system design is implemented using a customized field programmable gate array (FPGA), which enables the integration of various system components on one chip. The designed prototype is studied using both network monitoring tools and analytical techniques, to verify its function and compare it with the existing approaches.Performance measures show that the On Chip Novel Video Streaming System consumes less than 21 mW of power for 100 Mbps and 82 mW of power for 1 Gbps, and utilizes 57% of a Xilinx Spartan 2-100E-6FT256 FPGA resources. Hence, it is possible to incorporate further extensions. Experimental results show that 88% of the network utilization can be achieved, due to the use of the customized, FPGA-based design of bi-network traffic conversion.