Optimal Block Design for Asynchronous Wake-Up Schedules and Its Applications in Multihop Wireless Networks

In this paper, we consider the problem of designing optimal asynchronous wake-up schedules to facilitate distributed power management and neighbor discovery in multihop wireless networks. We first formulate it as a block design problem and derive the fundamental trade-offs between wake-up latency and the average duty cycle of a node. After the theoretical foundation is laid, we then devise a neighbor discovery and schedule bookkeeping protocol that can operate on the optimal wake-up schedule derived. To demonstrate the usefulness of asynchronous wake-up, we investigate the efficiency of neighbor discovery and the application of on-demand power management, which overlays a desirable communication schedule over the wake-up schedule mandated by the asynchronous wake-up mechanism. Simulation studies demonstrate that the proposed asynchronous wake-up protocol has short discovery time which scales with the density of the network; it can accommodate various traffic characteristics and loads to achieve an energy savings that can be as high as 70 percent, while the packet delivery ratio is comparable to that without power management.     

Fast handoff with reducing waste rate approach for wireless resources management in UMTS mobile networks

3G Wideband CDMA systems adopt the Orthogonal Variable Spreading Factor code tree as the channelization codes management for achieving high data rate transmission in personal multimedia communications. It assigns a single channelization code for each accepted connection. Nevertheless, it wastes the system capacity when the required rate is not powers of two of the basic rate. One good solution is to assign multiple codes for each accepted connection but it causes two inevitable drawbacks: long handoff delay and new call setup delay due to high complexity of processing with multiple channelization codes, and high cost of using more number of rake combiners. Especially, long handoff delay may result in more call dropping probability and higher Grade of Service, which will degrade significantly the utilization and revenue of the 3G cellular systems. Therefore, we propose herein an adaptive efficient codes determination algorithm based on the Markov Decision Process analysis approach to reduce the waste rate and reassignments significantly while providing fast handoff. Numerical results demonstrate that the proposed approach yields several advantages, including the lowest GOS, the least waste rate, and the least number of reassignments. Meanwhile, the optimal number of rake combiners is also analyzed in this paper. This research was supported in part by the National Science Council of Taiwan, ROC, under contract NSC-93-2213-E-324-018.     

Cover Picture: Arresting,Fixing, and Separating Dimers Composed of Uniform Silica Colloidal Spheres (Adv. Funct. Mater. 12/2006)

In colloidal suspensions of silica, particles undergo constant collisions. By controlling various parameters, the repulsive barrier can be reduced, thereby substantially increasing the number of collision‐induced dimerization events. Xia and co‐workers report on p. 1627 that the dimers could be arrested and then permanently fixed by introducing a small amount of fresh tetraethylorthosilicate into the colloidal suspension, with monodisperse dimer yields of up to 50 %. This yield could be increased to 80 % by centrifugation in a density gradient medium. When fresh tetraethylorthosilicate is introduced into a colloidal suspension of silica spheres, it hydrolyzes and condenses in situ to arrest and fix the dimers resulting from constant collisions between the spheres. By optimizing the experimental parameters (including the length of aging time) and the diameter of the silica spheres, as well as the concentrations of counterions, water, and ammonia, it is possible to routinely produce monodisperse dimers with a yield as high as 50 %. When combined with centrifugation using a density gradient medium, the yield of such dimers could be further increased to 80 %. It is believed that this method will provide a simple and versatile approach to the high‐volume production of dimers from spherical colloids composed of different materials. These dimers may find widespread use in a range of applications such as fabrication of photonic crystals and fundamental studies related to colloidal science.     

Dynamic Effects of Submillimeter Wave Radiation on Biological Objects of Various Levels of Organization

We have presented an overview of the literature and of our experimental data on the influence of electromagnetic radiation in the submillimeter spectral region on biological objects of molecular, cellular, and organism levels. Possible physical mechanisms involved and the reasons for limited development of the research in this spectral range are discussed.     

A 1.5-V 45-mW direct-conversion WCDMA receiver IC in 0.13-/spl mu/m CMOS

A 2-GHz direct-conversion receiver for wide-band code division multiple access (WCDMA) is presented. It includes two low-noise amplifiers (LNAs), an I/Q demodulator, and two sixth-order baseband channel select filters with programmable gain. Quadrature local oscillator (LO) signals are generated on chip in a frequency divider flip-flop. An external interstage filter between the LNAs rejects transmitter leakage to relax demodulator linearity requirements. A low-voltage demodulator topology improves linearity as well as demodulator output pole accuracy. The active-RC baseband filter uses a programmable servo loop for offset compensation and provides an adjacent channel rejection of 39 dB. Programmable gain over 71-dB range in 1-dB steps is merged with the filter to maximize dynamic range. An automatic on-chip frequency calibration scheme provides better than 1.5% corner frequency accuracy. The receiver is integrated in a 0.13-/spl mu/m CMOS process with metal-insulator-metal (MIM) capacitors. Measured receiver performance includes a 6.5-dB noise figure, IIP2 of +27 dBm, and IIP3 of -8.6 dBm. Power consumption is 45 mW.     

Randomized scheduling algorithms for high-aggregate bandwidth switches

The aggregate bandwidth of a switch is its port count multiplied by its operating line rate. We consider switches with high-aggregate bandwidths; for example, a 30-port switch operating at 40 Gb/s or a 1000-port switch operating at 1 Gb/s. Designing high-performance schedulers for such switches with input queues is a challenging problem for the following reasons: (1) high performance requires finding good matchings; (2) good matchings take time to find; and (3) in high-aggregate bandwidth switches there is either too little time (due to high line rates) or there is too much work to do (due to a high port count). We exploit the following features of the switching problem to devise simple-to-implement, high-performance schedulers for high-aggregate bandwidth switches: (1) the state of the switch (carried in the lengths of its queues) changes slowly with time, implying that heavy matchings will likely stay heavy over a period of time and (2) observing arriving packets will convey useful information about the state of the switch. The above features are exploited using hardware parallelism and randomization to yield three scheduling algorithms - APSARA, LAURA, and SERENA. These algorithms are shown to achieve 100% throughput and simulations show that their delay performance is quite close to that of the maximum weight matching, even when the traffic is correlated. We also consider the stability property of these algorithms under generic admissible traffic using the fluid-model technique. The main contribution of this paper is a suite of simple to implement, high-performance scheduling algorithms for input-queued switches. We exploit a novel operation, called MERGE, which combines the edges of two matchings to produce a heavier match, and study of the properties of this operation via simulations and theory. The stability proof of the randomized algorithms we present involves a derandomization procedure and uses methods which may have wider applicability.     

AIRS/Vis near IR instrument

A component of the Atmospheric Infrared Sounder (AIRS) instrument system is the AIRS/Visible Near InfraRed (Vis/NIR) instrument. With a nadir ground resolution of 2.28 km and four channels, the Vis/NIR instrument provides diagnostic support to the infrared retrievals from the AIRS instrument and several research products, including surface solar flux studies. The AIRS Vis/NIR is composed of three narrowband (channel 1: 0.40-0.44 /spl mu/m; channel 2: 0.58-0.68 /spl mu/m, and channel 3: 0.71-0.92 /spl mu/m) and one broadband (channel 4: 0.49-0.94 /spl mu/m) channel, each a linear detector array of nine pixels. It is calibrated onboard with three tungsten lamps. Vicarious calibrations using ground targets of known reflectance and a cross-calibration with the Moderate Resolution Imaging Spectroradiometer (MODIS) augment the onboard calibration. One of AIRS Vis/NIR's principal supporting functions is the detection of low clouds to flag these conditions for atmospheric temperature retrievals. Once clouds are detected, a cloud height index is obtained based on the ratio (channel 2 - channel 3)/channel 1 that is sensitive to the partitioning of water vapor absorption above and below clouds. The determination of the surface solar radiation flux is principally based on channel 4 broadband measurements and the well-established relationship between top-of-the atmosphere (broadband) radiance and the surface irradiance.     

Robust vector control of induction motors using full-order observer in consideration of core loss

This paper proposes a method for designing a robust full-order observer for vector-controlled induction motors taking core loss into account. Although conventional research focuses on parameter identification, global stability of the identification remains questionable. Therefore, robustness against some parameters is required. This paper describes the design of a robust full-order observer which takes core loss into account, using both the gain-scheduled H/sub /spl infin// control and the linear matrix inequality technique. This design always results in a stable controller. The robustness of the proposed method against variations of resistances is evaluated by experiments.     

A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC

A redundant multivalued logic is proposed for high-speed communication ICs. In this logic, serial binary data are received and converted into parallel redundant multivalued data. Then they are restored into parallel binary data. Because of the multivalued data conversion, this logic makes it possible to achieve higher operating speeds than that of a conventional binary logic. Using this logic, a 1:4 demultiplexer (DEMUX, serial-parallel converter) IC was fabricated using a 0.18-/spl mu/m CMOS process. The IC achieved an operating speed of 10 Gb/s with a supply voltage of only 1.3 V and with power consumption of 38 mW. This logic may achieve CMOS communication ICs with an operating speed several times greater than 10 Gb/s.