Robust decoding of variable-length encoded Markov sources using a three-dimensional trellis

In this letter, we present an improved index-based a-posteriori probability (APP) decoding approach for the error-resilient transmission of packetized variable-length encoded Markov sources. The proposed algorithm is based on a novel two-dimensional (2D) state representation which leads to a three-dimensional trellis with unique state transitions. APP decoding on this trellis is realized by employing a 2D version of the BCJR algorithm where all available source statistics can be fully exploited in the source decoder. For an additional use of channel codes the proposed approach leads to an increased error-correction performance compared to a one-dimensional state representation.     

Analogue switch for very low-voltage applications

A new analogue switch suitable for operation at very low-voltage supply in a standard CMOS technology is presented. The proposed switch is based on 'quasi-floating-gate' transistors and has a simple and compact structure. For illustrative purposes, two sample-and-hold circuits operating from a single supply voltage close to the threshold voltage of a transistor, and using the proposed technique, are presented. Experimental results obtained from prototypes in a 1.5 /spl mu/m CMOS technology are provided.     

Reliability investigation of 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel

The authors have investigated the reliability performance of G-band (183 GHz) monolithic microwave integrated circuit (MMIC) amplifiers fabricated using 0.07-/spl mu/m T-gate InGaAs-InAlAs-InP HEMTs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel on 3-in wafers. Life test was performed at two temperatures (T/sub 1/ = 200 /spl deg/C and T/sub 2/ = 215 /spl deg/C), and the amplifiers were stressed at V/sub ds/ of 1 V and I/sub ds/ of 250 mA/mm in a N/sub 2/ ambient. The activation energy is as high as 1.7 eV, achieving a projected median-time-to-failure (MTTF) /spl ap/ 2 /spl times/ 10/sup 6/ h at a junction temperature of 125 /spl deg/C. MTTF was determined by 2-temperature constant current stress using /spl Delta/G/sub mp/ = -20% as the failure criteria. The difference of reliability performance between 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel and 0.1-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with In/sub 0.6/Ga/sub 0.4/As channel is also discussed. The achieved high-reliability result demonstrates a robust 0.07-/spl mu/m pseudomorphic InGaAs-InAlAs-InP HEMT MMICs production technology for G-band applications.     

Improved-performance noncoherent weighted-coefficients diversity combiner for DPSK and NC-FSK signals in nonidentical Nakagami fading channels

It is well-known that noncoherent equal-gain combining (NC-EGC) is the simplest combining technique for noncoherent and differentially coherent communication systems. However, for nonidentical Nakagami-m channels (channels having nonuniform multipath intensity profile (MIP) and/or arbitrary non-integer fading parameters), the use of NC-EGC has three main disadvantages. First, its performance serves as a lossy upper bound to that of the optimum diversity combiner. Second, it results in complicated expressions for the system average error performance. Third, it incurs noncoherent combining loss (does not aid the use of diversity) at relatively low average signal-to-noise ratio (SNR). In this letter, we propose a modified version of the NC-EGC, which is a noncoherent combiner with weighting coefficients, to overcome the disadvantages of the conventional one. We show that this alternative combiner does provide improvements over the conventional N.C-EGC for all values of average SNRs, it does not incur any noncoherent combining loss, and it leads to a design of the receiver whose average error performance can be evaluated easily.     

Reversed Temperature-Dependent Propagation Delay Characteristics in Nanometer CMOS Circuits

The supply voltage to threshold voltage ratio is reduced with each new technology generation. The gate overdrive variation with temperature plays an increasingly important role in determining the speed characteristics of CMOS integrated circuits. The temperature-dependent propagation delay characteristics, as shown in this brief, will experience a complete reversal in the near future. Contrary to the older technology generations, the speed of circuits in a 45-nm CMOS technology is enhanced when the temperature is increased at the nominal supply voltage. Operating an integrated circuit at the prescribed nominal supply voltage is not preferable for reliable operation under temperature fluctuations. A design methodology based on optimizing the supply voltage for temperature-variation-insensitive circuit performance is proposed in this brief. The optimum supply voltage is 45% to 53% lower than the nominal supply voltage in a 180-nm CMOS technology. Alternatively, the optimum supply voltage is 15% to 35% higher than the nominal supply voltage in a 45-nm CMOS technology. The speed and energy tradeoffs in the supply voltage optimization technique are also presented     

High Rate Data Synchronization in GALS SoCs

Globally asynchronous, locally synchronous (GALS) systems-on-chip (SoCs) may be prone to synchronization failures if the delay of their locally-generated clock tree is not considered. This paper presents an in-depth analysis of the problem and proposes a novel solution. The problem is analyzed considering the magnitude of clock tree delays, the cycle times of the GALS module, and the complexity of the asynchronous interface controllers using a timed signal transition graph (STG) approach. In some cases, the problem can be solved by extracting all the delays and verifying whether the system is susceptible to metastability. In other cases, when high data bandwidth is not required, matched-delay asynchronous ports may be employed. A novel architecture for synchronizing inter-modular communications in GALS, based on locally delayed latching (LDL), is described. LDL synchronization does not require pausable clocking, is insensitive to clock tree delays, and supports high data rates. It replaces complex global timing constraints with simpler localized ones. Three different LDL ports are presented. The risk of metastability in the synchronizer is analyzed in a technology-independent manner     

Self-oscillating dimmable electronic ballast

This paper presents a simple alternative for an electronic ballast operating in self-sustained oscillating mode with dimming capability for fluorescent lamps. A simple modification in one of the gate drivers side circuit allows the lamp to dim without compromising the simplicity, reliability, and low cost which characterize the self-oscillating electronic ballast (SOEB). A qualitative analysis is presented to explain the behavior of the proposed self-oscillating electronic ballast with dimming feature. In addition, the stability and the key equations for the design are derived using the extended Nyquist criterion and describing function method. Experimental results from two 40-W electronic ballasts are presented to demonstrate the performance and to validate the analysis carried out.     

Ambient Technology — Now You See It, Now You Don't

The continuing progression of Moore's Law has enabled the miniaturisation and dramatic cost reduction in electronics over the last ten years. For a truly pervasive communications environment the challenges of hiding key hardware technologies from the user are rapidly being overcome. This paper reviews the status of these hardware technology developments in the pervasive space and briefly discusses other contributing factors that will enable the pervasive vision to be realised.     

Smooth profile generation for a tile printing machine

In this paper a digital filter is proposed for the generation of smooth set points for motion control systems. The proposed nonlinear filter produces profiles with bounded velocity and acceleration starting from rough reference signals (steps and ramps). An actual implementation of the filter for a tile printing machine is presented and experimental results are reported.