Synthesis of the pyridinyl analogues of dibenzylideneacetone (pyr-dba) via an improved Claisen-Schmidt condensation, displaying diverse biological activities as curcumin analogues

An efficient and easy procedure to synthesize the pyridinyl analogues of dibenzylideneacetone (pyr-dba) was developed by the condensation of substituted nicotinaldehyde and acetone in the presence of K(2)CO(3) in toluene-EtOH-H(2)O solvent system. Structurally diverse pyr-dba, including quinolinyl dba, can be prepared conveniently in moderate to excellent yields under mild conditions with this method. The resulting pyr-dba functioned as the enone analogs of curcumin and efficiently inhibited the activation of NF-κB and the growth of colorectal carcinoma HCT116 p53+/+ cells as well as the HIV-1 IN-LEDGF/p75 interaction.     

Synthesis and Characterization of Tungsten Trioxide/Polyaniline/Polyacrylonitrile Composite Nanofibers for Application as a Counter Electrode of DSSCs

Russian Journal of Electrochemistry - —Electrospinning and spin-coating techniques were used for the fabrication of polyacrylonitrile/polyaniline/WO3 (PAN/PANI/WO3) nanocomposite nanofibers...     

Structural Damage Identification Using an Adaptive Multi-stage Optimization Method Based on a Modified Particle Swarm Algorithm

An adaptive multi-stage optimization method utilizing a modified particle swarm optimization (MPSO) is proposed here to identify the multiple damage cases of structural systems. First the structural damage problem is defined as a standard optimization problem. An efficient objective function considering the first few natural frequencies of a structure, before and after damage, is utilized for optimization. A modified particle swarm optimization (MPSO) dealing with real values of damage variables is introduced to solve the optimization problem. In order to assess the performance of the proposed method, some illustrative examples with and without considering the measurement noise are tested. Numerical results demonstrate the high accuracy of the method proposed for determining the site and severity of multiple damage cases in the structural systems.     

Chaotic advection induced heat transfer enhancement in a chevron-type plate heat exchanger

The present work examines the role of chaotic mixing as a means of heat transfer enhancement in plate heat exchangers. In order to demonstrate the chaotic behavior, sensitivity to initial conditions and horseshoe maps are visualized. The Nusselt number and the friction factor were computed in the range of reynolds number, 1 < Re < 10. The Nusselt number increases considerably in chaotic models whereas the friction factor increases only marginally.     

Boltzmann asymptotics with diffuse reflection boundary conditions

StrongL ¹-convergence towards a stationary solution when time tends to infinity is established for the solutions of the time-dependent nonlinear Boltzmann equation in a bounded domain ³ with constant temperature on the boundary. The collisionless case is first investigated in the varying temperature case.     

Model to predict gate tunneling current of plasma oxynitrides

Two key parameters for silicon MOSFET scaling, equivalent oxide thickness (EOT) and gate leakage current density (J/sub g/) are measured and modeled for silicon oxynitride (Si-O-N) gate dielectrics formed by plasma nitridation of SiO/sub 2/. It is found that n-MOSFET inversion J/sub g/ is larger than p-MOSFET inversion J/sub g/ when the gate dielectric consists of less than 27% nitrogen atoms, indicating substrate injection of electrons is dominant for this range of plasma nitrided Si-O-N. To examine the intrinsic scaling of Si-O-N, we model EOT and n-MOSFET J/sub g/ for sub-2-nm physically thick gate dielectrics as a function of film physical thickness and nitrogen content. The model has four free fitting parameters and unlike existing models does not assume a priori the values of the oxide and nitride dielectric constant, barrier height, or effective mass. It indicates that at a given EOT, leakage current of n-MOSFETs with Si-O-N gate dielectrics reaches a minimum at a specific nitrogen content. Through the use of this model, we find that plasma nitrided Si-O-N can meet the 65-nm International Technology Roadmap for Semiconductors specifications for J/sub g/, and we estimate the nitrogen concentration required for each node and application.     

Physical Mechanism and Gate Insulator Material Dependence of Generation and Recovery of Negative-Bias Temperature Instability in p-MOSFETs

Impact of gate dielectric processing [plasma and thermal nitridation, nitrogen total dose, effective oxide thickness (EOT)] on negative-bias temperature instability (NBTI) degradation and recovery is studied. The magnitude, field, and temperature dependence of NBTI is measured using no-delay I_DLIN method and carefully compared to charge-pumping measurements. Plasma (thin and thick EOT) and thermal (thin EOT) oxynitrides show very similar temperature and time dependence of NBTI generation, which is identical to control oxides and is shown to be due to generation of interface traps. NBTI enhancement for oxynitride films is shown to be dependent on nitrogen concentration at the Si-SiO₂ interface and plasma oxynitrides show lower NBTI compared to their thermal counterparts for same total nitrogen dose and EOT. Both fast and slow NBTI recovery components are shown to be due to recovery of generated interface traps. Recovery fraction reduces at lower EOT, while for similar EOT oxynitrides show lower recovery with-respect-to control oxides. NBTI generation and recovery is explained with the framework of reaction-diffusion model.     

A high performances CMOS CCII and high frequency applications

In this paper, we propose an improved translinear based CCII configuration. Heuristic algorithm is used for optimal sizing regarding static and dynamic performances. PSPICE simulations for AMS 0.35 μm CMOS technology show that the current and voltage bandwidths are respectively 2.6 GHz and 3.9 GHz, and the parasitic resistance at port X (R _X ) has a value of 18 Ω for a control current of 100 μA. The improved configuration is used as a building block into high frequency design applications: a current controlled oscillator and a tunable fully integrable band pass filter. The oscillator frequency can be tuned in the range of [290–475 MHz] by a simple variation of a DC current. The central frequency of the band pass filter can be varied in the range of [1.22–1.56 GHz] and the quality factor vary in the range [8–306] with a simple variation of a DC current.     

The reaction of (N-isocyanimino)triphenylphosphorane with dialkyl acetylenedicarboxylates in the presence of 1,3-diphenyl-1,3-propanedione: a novel three-component reaction for the stereoselective synthesis of dialkyl (Z)-2-(5,7-diphenyl-1,3,4-oxadiazepin-2-yl)-2-butenedioates

Reactions of dialkyl acetylenedicarboxylates with (N-isocyanimino)triphenylphosphorane in the presence of 1,3-diphenyl-1,3-propanedione proceed smoothly at room temperature to afford dialkyl (Z)-2-(5,7-diphenyl-1,3,4-oxadiazepin-2-yl)-2-butenedioates in high yields. The stereochemistry of the final products were confirmed by single crystal X-ray structure determination. The reaction is completely stereoselective.     

An FPGA implementation of HW/SW codesign architecture for H.263 video coding

In this paper, we present an efficient HW/SW codesign architecture for H.263 video encoder and its FPGA implementation. Each module of the encoder is investigated to find which approach between HW and SW is better to achieve real-time processing speed as well as flexibility. The hardware portions include the Discrete Cosine Transform (DCT), inverse DCT (IDCT), quantization (Q) and inverse quantization (IQ). Remaining parts were realized in software executed by the NIOS II softcore processor. This paper also introduces efficient design methods for HW and SW modules. In hardware, an efficient architecture for the 2-D DCT/IDCT is suggested to reduce the chip size. A NIOS II Custom instruction logic is used to implement Q/IQ. Software optimization technique is also explored by using the fast block-matching algorithm for motion estimation (ME). The whole design is described in VHDL language, verified in simulations and implemented in Stratix II EP2S60 FPGA. Finally, the encoder has been tested on the Altera NIOS II development board and can work up to 120 MHz. Implementation results show that when HW/SW codesign is used, a 15.8-16.5 times improvement in coding speed is obtained compared to the software based solution.