X-ray or UV adjustment of MOS threshold voltage: Analytical and numerical modeling

A model is formulated that describes how radiation-induced charge accumulates in the gate oxide of a MOS structure and how it decays through tunneling and thermal emission. The model is used in a numerical analysis of the x-ray or UV adjustment of threshold voltage in MOS-circuit manufacture. The limits of this process technique are evaluated.     

Using the magneto-optical Kerr effect to study magnetization processes in two-dimensional magnonic crystals based on YIG thin films

The magneto-optical Kerr effect for red (628 nm) and green (532 nm) light is used to study magnetization processes in 2D magnonic crystals obtained by etching pits with the diameter D ≈ 32 μm to a depth of t ≤ 2 μm in a 16.1-μm-thick film of yttrium iron garnet (YIG). Hysteresis loops obtained in the case of the inplane crystal magnetization at 628 nm are characterized by lower saturation fields H _s and higher remanent magnetizations than those obtained at 532 nm, a result that is attributed to different absorption coefficients of the YIG film at these wavelengths. This difference between the magnetization curves reflects the fact that the magnonic-crystal surface probed with the green light makes a greater contribution to the magneto-optical Kerr effect. Therefore, the green light is more sensitive to the demagnetizing fields, which govern magnetization processes in the magnonic crystals.     

Scaling planar silicon devices

The generation-over-generation scaling of critical CMOS technology parameters is ultimately bound by nonscalable limitations, such as the thermal voltage and the elementary electronic charge. Sustained improvement in performance and density has required the introduction of new device structures and materials. Partially depleted SOI, a most recent MOSFET innovation, has extended VLSI performance while introducing unique idiosyncrasies. Fully depleted SOI is one logical extension of this device design direction. Gate dielectric tunneling, device self-heating, and single-event upsets present developers of these next-generation devices with new challenges. Strained silicon and high-permittivity gate dielectric are examples of new materials that will enable CMOS developers to continue to deliver device performance enhancements in the sub-100 nm regime.     

Effects of SiN passivation and high-electric field on AlGaN-GaN HFET degradation

The authors report on the effects of silicon nitride (SiN) surface passivation and high-electric field stress (hot electron stress) on the degradation of undoped AlGaN-GaN power HFETs. Stressed devices demonstrated a decrease in the drain current and maximum transconductance and an increase in the parasitic drain series resistance, gate leakage, and subthreshold current. The unpassivated devices showed more significant degradation than SiN passivated devices. Gate lag phenomenon was observed from unpassivated devices and removed by SiN passivation. However, SiN passivated devices also showed gate lag phenomena after high-electric field stress, which suggests possible changes in surface trap profiles occurred during high-electric field stress test.     

Influence of device engineering on the analog and RF performances of SOI MOSFETs

This work presents a systematic comparative study of the influence of various process options on the analog and RF properties of fully depleted (FD) silicon-on-insulator (SOI), partially depleted (PD) SOI, and bulk MOSFET's with gate lengths down to 0.08 /spl mu/m. We introduce the transconductance-over-drain current ratio and Early voltage as key figures of merits for the analog MOS performance and the gain and the transition and maximum frequencies for RF performances and link them to device engineering. Specifically, we investigate the effects of HALO implantation in FD, PD, and bulk devices, of film thickness in FD, of substrate doping in SOI, and of nonstandard channel engineering (i.e., asymmetric Graded-channel MOSFETs and gate-body contacted DTMOS).     

Static energy reduction techniques for microprocessor caches

Microprocessor performance has been improved by increasing the capacity of on-chip caches. However, the performance gain comes at the price of static energy consumption due to subthreshold leakage current in cache memory arrays. This paper compares three techniques for reducing static energy consumption in on-chip level-1 and level-2 caches. One technique employs low-leakage transistors in the memory cell. Another technique, power supply switching, can be used to turn off memory cells and discard their contents. A third alternative is dynamic threshold modulation, which places memory cells in a standby state that preserves cell contents. In our experiments, we explore the energy and performance tradeoffs of these techniques. We also investigate the sensitivity of microprocessor performance and energy consumption to additional cache latency caused by leakage-reduction techniques.     

Carbon adsorbents for the sorpting and concentrating nobel metals

Kinetic, sorption and selectivity properties of commercial adsorbents are improved by adding petroleum residues (tar asphaltene concentrates) 13% of whole mass. Obtained adsorbents can be used for selective extraction of nobel metals from multicomponent polymetallic solutions of heavy metals and fro sewages purification for removing arsenic.     

Diffraction by a Corrugated Interface. Complete Transformation of an Incident Wave to the Diffraction Lobe

Using the simplest (sinusoidal) corrugation profile in the approximation of absence of losses in the material as an example, we study the regimes of complete transformation of an incident wave to the diffraction lobe by a corrugated metal surface or a corrugated interface of two dielectric media. A numerical-intuitive pattern of appearance and evolution of such regimes with increasing corrugation amplitude is revealed. It is shown that the regimes of complete transformation of an incident wave to the diffraction lobe are possible in both the case of autocollimation and the case of a considerable deviation from it. The examination is based on a numerical method of solving the integral equation by means of a specially created interactive processing system in Visual Fortran.     

Inside Front Cover: The Elastic Properties and Plastic Behavior of Two‐Dimensional Polymer Structures Fabricated by Laser Interference Lithography (Adv. Funct. Mater. 10/2006)

The probing of the micromechanical properties within a two‐dimensional polymer structure with sixfold symmetry fabricated via interference lithography reveals a nonuniform spatial distribution in the elastic modulus “imprinted” with an interference pattern in work reported by Tsukruk, Thomas, and co‐workers on p. 1324. The image prepared by M. Lemieux and T. Gorishnyy shows how the interference pattern is formed by three laser beams and is transferred to the solid polymer structure. The elastic and plastic properties within a two‐dimensional polymer (SU8) structure with sixfold symmetry fabricated via interference lithography are presented. There is a nonuniform spatial distribution in the elastic modulus, with a higher elastic modulus obtained for nodes (brightest regions in the laser interference pattern) and a lower elastic modulus for beams (darkest regions in the laser interference pattern) of the photopatterned films. We suggest that such a nonuniformity and unusual plastic behavior are related to the variable material properties “imprinted” by the interference pattern.     

High resistivity measurement of SiC wafers using different techniques

To establish fast, nondestructive, and inexpensive methods for resistivity measurements of SiC wafers, different resistivity-measurement techniques were tested for characterization of semi-insulating SiC wafers, namely, the four-point probe method with removable graphite contacts, the van der Pauw method with annealed metal and diffused contacts, the current-voltage (I-V) technique, and the contactless resistivity-measurement method. Comparison of different techniques is presented. The resistivity values of the semi-insulating SiC wafer measured using different techniques agree fairly well. As a result, application of removable graphite contacts is proposed for fast and nondestructive resistivity measurement of SiC wafers using the four-point probe method. High-temperature van der Pauw and room-temperature Hall characterization for the tested semi-insulating SiC wafer was also obtained and reported in this work.