Multiple recurrence and infinite measure preserving odometers

A family of infinite measure preserving odometers is presented which exhibit examples ofp-recurrent but notp+1-recurrent ergodic transformations for everyp>1.     

Self-aligned offset gated poly-Si TFTs with a floating sub-gate

We have fabricated a self-aligned offset-gated poly-Si thin film transistor (TFT) by employing a novel photoresist reflow process. The gate structure of the new device is consisted of two unique patterns: A main-gate and a sub-gate. The new fabrication method extends the gate-oxide over the offset region. With the assistance of the sub-gate and reflowed photoresist a self-aligned offset region is successfully obtained due to the offset oxide acting as an implantation mask. The poly-Si TFT with symmetrical offsets is easily fabricated and the new method does not require any additional offset mask step. Compared with the misaligned offset gated poly-Si TFTs, excellent symmetric electrical characteristics are obtained     

A possibility of parallel and anti-parallel diffraction measurements on neutron diffractometer employing bent perfect crystal monochromator at the monochromatic focusing condition

In a conventional diffractometer having single monochromator, only one position, parallel position, is used for the diffraction experiment (i.e. detection) because the resolution property of the other one, anti-parallel position, is very poor. However, a bent perfect crystal (BPC) monochromator at monochromatic focusing condition can provide a quite flat and equal resolution property at both parallel and anti-parallel positions and thus one can have a chance to use both sides for the diffraction experiment. From the data of the FWHM and the Δd/d measured on three diffraction geometries (symmetric, asymmetric compression and asymmetric expansion), we can conclude that the simultaneous diffraction measurement in both parallel and anti-parallel positions can be achieved.     

A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor

A 4-MB L2 data cache was implemented for a 64-bit 1.6-GHz SPARC(r) RISC microprocessor. Static sense amplifiers were used in the SRAM arrays and for global data repeaters, resulting in robust and flexible timing operation. Elimination of the global clock grid over the SRAM array saves power, enabled by combining the clock information with array select signals. Redundancy was implemented flexibly, with shift circuits outside the main data array for area efficiency. The chip integrates 315 million transistors and uses an 8-metal-layer 90-nm CMOS process.     

Single fundamental mode photonic crystal vertical cavity laser with improved output power

The single fundamental mode output power of photonic crystal vertical cavity lasers is improved by varying sizes of oxide apertures and defect lasing apertures. A maximum output power of 3.1 mW in the fundamental mode has been achieved with a new fabrication process that involves only focused ion beam etching to create holes in selectively oxidised VCSELs.     

Stability control of the electrooptic effect with new maleimide copolymers containing photoreactive tricyanopyrrolidene‐based chromophores

New photocrosslinkable maleimide copolymers have been synthesized by the attachment of a tricyanopyrrolidene‐based chromophore. The 2‐(3‐cyano‐4‐(2‐{4‐[hexyl‐(6‐hydroxy‐hexyl)‐amino]‐phenyl}‐vinyl)‐5‐oxo‐1‐{4‐[4‐(3‐oxo‐3‐phenyl‐propenyl)‐ phenoxy]‐butyl}‐1,5‐dihydro‐pyrrol‐2‐ylidene)‐malononitrile chromophore exhibits nonlinear optical activity and contains a chalcone moiety that is sensitive to UV light (λ = 330–360 nm) for crosslink formation. The maleimide monomers have also been functionalized with chalcone moieties. The resultant copolymers exhibit great processability, and one of them shows a maximum electrooptic coefficient of 90 pm/V at 1300 nm. We could control the thermal stability of the electrooptic coefficient with the newly synthesized photoreactive copolymers successfully. © 2006 Wiley Periodicals, Inc. J Polym Sci Part A: Polym Chem 45: 531–542, 2007     

Joint data rate and power allocation for lifetime maximization in interference limited ad hoc networks

In this paper, we consider the following problem in the wireless ad hoc network: Given a set of paths between source and destination, how to divide the data flow among the paths and how to control the transmission rates, times, and powers of the individual links in order to maximize the operation time of the worst network node. If all nodes are of equal importance, the operation time of the worst node is also the lifetime of the network. By solving the problem, our aim is to investigate how the network lifetime is affected by link conditions such as the maximum transmission power of a node and the peak data rate of a link. For the purpose, we start from a system model that incorporates the carrier to interference ratio (CIR) into a variable data rate of a link. With this, we can develop an iterative algorithm for the lifetime maximization, which resembles to the distributed power control in cellular systems. Numerical examples on the iterative algorithm are included to illustrate the network lifetime as a function of the maximum transmission power and the peak data rate.     

Modeling of radiative heat transfer in an axisymmetric cylindrical enclosure with participating medium

Radiative heat transfer in an axisymmetric enclosure with absorbing, emitting, and scattering medium is studied here by using the different methods such as MDOM, FVM, and MFVM with emphasis on the treatment of angular derivative term, which appears in curvilinear coordinates due to angular redistribution. After final discretization equation for MFVM is introduced by using the step scheme and directional weights, the present approach is validated by applying it to three different benchmarking problems with absorbing, emitting, and scattering medium. All of the results presented here support its accuracy as well as moderate efficiency. Finally, the present approaches are applied to a truncated cone-shaped enclosure as a body-fitted geometry case.     

Optimization of in-vacuo template-stripped Pt surfaces via UHV STM

A recently demonstrated [1] in-vacuo template-stripping process is applied to the study of platinum films stripped from ultra-flat silicon-oxide surfaces. Template-stripped (TS) Pt surfaces, prepared with a range of post-deposition annealing times prior to being stripped from the templating surface in an ultra-high vacuum (UHV) environment, are examined by UHV scanning tunneling microscopy (STM). These studies reveal that without post-deposition annealing, TS Pt surfaces are largely made up of poorly-ordered, granular nanostructures undesirable for many applications. The post-deposition annealing treatments explored in the study result in the emergence and continuous growth of large smooth crystallites. Issues with crystallite orientation relative to the TS surface and artefacts arising as a result of the epoxy used in the template-stripping process are presented and discussed in relation to optimizing the template-stripping procedure for specific applications such as self-assembled monolayer (SAM) formation for molecular electronics. PACS 68.37.Ef; 68.47.De; 68.55.Jk; 81.05.Bx; 81.15.Ef