Performance study of iSCSI-based storage subsystems

iISCSI is emerging as an end-to-end protocol for transporting storage I/O block data over IP networks. By exploiting the ubiquitous Internet infrastructure, iSCSI greatly facilitates remote storage, remote backup, and data mirroring. This article evaluates the performance of two typical iSCSI storage subsystems by measuring and analyzing block-level I/O access performance and file-level access performance. In the file-level performance study, we compare file access performance in an NAS scheme with that in an iSCSI-based SAN scheme. Our test results show that Gigabit Ethernet-based iSCSI can reach very high bandwidth, close to that of a direct FC disk access in block I/O access. However, when the iSCSI traverses through longer distance, throughput relies heavily on the available bandwidth between the initiator and the target. On the other hand, the file-level performance shows that iSCSI-based file access (SAN scheme) provides higher performance than using NFS protocol in Linux and SMB protocol in Windows (NAS scheme). However, the advantage of using iSCSI-based file accesses decreases as the file size increases. The obtained experimental results shed some light on the performance of applications based on iSCSI storage.     

Popular biorthogonal wavelet filters via a lifting scheme and its application in image compression

A technique using a lifting scheme is presented for constructing compactly supported wavelets whose coefficients are composed of free variables locating in an interval. An efficient approach-based wavelet for image compression is developed by selecting the coefficients of the 9-7 wavelet filter and associated lifting scheme. Furthermore, the rationalised coefficients wavelet filter that can be implemented with simple integer arithmetic is achieved and its characteristic is close to the well known original irrational coefficients 9-7 wavelet filters developed by A. Cohen et al. (Commun. Pure Appl. Maths., vol.45, no.1, p.485-560, 1992). To reduce the computational cost of image coding applications further, an acceleration technique is proposed for the lifting steps. Software and hardware simulations show that the new method has very low complexity, and simultaneously preserves the high quality of the compressed image.     

A New Hand-Held Microsystem Architecture for Biological Analysis

This paper presents a hand-held microsystem based on new fully integrated magnetoresistive biochips for biomolecular recognition (DNA hybridization, antibody antigen interaction, etc.). Magnetoresistive chip surfaces are chemically treated, enabling the immobilization of probe biomolecules such as DNA or antibodies. Fluid handling is also integrated in the biochip. The proposed microsystem not only integrates the biochip, which is an array of 16times16 magnetoresistive sensors, but it also provides all the electronic circuitry for addressing and reading out each transducer. The proposed architecture and circuits were specifically designed for achieving a compact, programmable and portable microsystem. The microsystem also integrates a hand-held analyzer connected through a wireless channel. A prototype of the system was already developed and detection of magnetic nanoparticles was obtained. This indicates that the system may be used for magnetic label based bioassays     

An optically clocked transistor array with dual serial-to-parallel and parallel-to-serial conversion capability for optical label swapping

We propose an optically clocked transistor array optoelectronic integrated circuit (OEIC) for both serial-to-parallel and parallel-to-serial conversion (demux/mux), enabling an interface between high-speed asynchronous burst optical labels and CMOS circuitry for optical label swapping. Dual functionality of the OEIC reduces size, power, and cost of the optical label swapper. The capability for greater than 20-Gb/s conversion operation is demonstrated.     

A fuzzy logic based-method for prognostic decision making in breast and prostate cancers

Accurate and reliable decision making in oncological prognosis can help in the planning of suitable surgery and therapy, and generally, improve patient management through the different stages of the disease. In recent years, several prognostic markers have been used as indicators of disease progression in oncology. However, the rapid increase in the discovery of novel prognostic markers resulting from the development in medical technology, has dictated the need for developing reliable methods for extracting clinically significant markers where complex and nonlinear interactions between these markers naturally exist. The aim of this paper is to investigate the fuzzy k-nearest neighbor (FK-NN) classifier as a fuzzy logic method that provides a certainty degree for prognostic decision and assessment of the markers, and to compare it with: 1) logistic regression as a statistical method and 2) multilayer feedforward backpropagation neural networks an artificial neural-network tool, the latter two techniques having been widely used for oncological prognosis. In order to achieve this aim, breast and prostate cancer data sets are considered as benchmarks for this analysis. The overall results obtained indicate that the FK-NN-based method yields the highest predictive accuracy, and that it has produced a more reliable prognostic marker model than both the statistical and artificial neural-network-based methods.     

Exposed Die-Top Encapsulation Molding for an Improved High- Performance Flip Chip BGA Package

The recent advancement in high- performance semiconductor packages has been driven by the need for higher pin count and superior heat dissipation. A one-piece cavity lid flip chip ball grid array (BGA) package with high pin count and targeted reliability has emerged as a popular choice. The flip chip technology can accommodate an I/O count of more than five hundreds500, and the die junction temperature can be reduced to a minimum level by a metal heat spreader attachment. None the less, greater expectations on these high-performance packages arose such as better substrate real estate utilization for multiple chips, ease in handling for thinner core substrates, and improved board- level solder joint reliability. A new design of the flip chip BGA package has been looked into for meeting such requirements. By encapsulating the flip chip with molding compound leaving the die top exposed, a planar top surface can be formed. A, and a flat lid can then be mounted on the planar mold/die top surface. In this manner the direct interaction of the metal lid with the substrate can be removed. The new package is thus less rigid under thermal loading and solder joint reliability enhancement is expected. This paper discusses the process development of the new package and its advantages for improved solder joint fatigue life, and being a multichip package and thin core substrate options. Finite-element simulations have been employed for the study of its structural integrity, thermal, and electrical performances. Detailed package and board-level reliability test results will also be reported     

Sigma-delta modulators operating at a limit cycle

A new type of sigma-delta modulator that operates in a special mode named limit-cycle mode (LCM) is proposed. In this mode, most of the SDM building blocks operate at a frequency that is an integer fraction of the applied sampling frequency. That brings several very attractive advantages: a reduction of the required power consumption per converted bandwidth, an immunity to excessive loop delays and to digital-analog converter waveform asymmetry and a higher tolerance to clock imperfections. The LCMs are studied via a graphical application of the describing function theory. A second-order continuous time SDM with 5 MHz conversion bandwidth, 1 GHz sampling frequency and 125 MHz limit-cycle frequency is used as a test case for the evaluation of the performance of the proposed type of modulators. High level and transistor simulations are presented and compared with the traditional SDM designs.     

1/f noise in large-area Hg<Subscript>1−x</Subscript>Cd<Subscript>x</Subscript>Te photodiodes

The 1/f noise in photovoltaic (PV) molecular-beam epitaxy (MBE)-grown Hg_1−xCd_xTe double-layer planar heterostructure (DLPH) large-area detectors is a critical noise component with the potential to limit sensitivity of the cross-track infrared sounder (CrIS) instrument. Therefore, an understanding of the origins and mechanisms of noise currents in these PV detectors is of great importance. Excess low-frequency noise has been measured on a number of 1000-μm-diameter active-area detectors of varying “quality” (i.e., having a wide range of I-V characteristics at 78 K). The 1/f noise was measured as a function of cut-off wavelength under illuminated conditions. For short-wave infrared (SWIR) detectors at 98 K, minimal 1/f noise was measured when the total current was dominated by diffusion with white noise spectral density in the mid-10⁻¹⁵A/Hz^1/2 range. For SWIR detectors dominated by other than diffusion current, the ratio, α, of the noise current in unit bandwidth i_n(f = 1 Hz, V_d = −60 mV, and Δf = 1 Hz) to dark current I_d(V_d = −60 mV) was α_SW-d = i_n/I_d ∼ 1 × 10⁻³. The SWIR detectors measured at 0 mV under illuminated conditions had median α_SW-P = i_n/I_ph ∼ 7 × 10⁻⁶. For mid-wave infrared (MWIR) detectors, α_MW-d = i_n/I_d ∼ 2 × 10⁻⁴, due to tunneling current contributions to the 1/f noise. Measurements on forty-nine 1000-μm-diameter MWIR detectors under illuminated conditions at 98 K and −60 mV bias resulted in α_MW-P = i_n/I_ph = 4.16 ± 1.69 × 10⁻⁶. A significant point to note is that the photo-induced noise spectra are nearly identical at 0 mV and 100 mV reverse bias, with a noise-current-to-photocurrent ratio, α_MW-P, in the mid 10⁻⁶ range. For long-wave infrared (LWIR) detectors measured at 78 K, the ratio, α_LW-d = i_n/I_d ∼ 6 × 10⁻⁶, for the best performers. The majority of the LWIR detectors exhibited α_LW-d on the order of 2 × 10⁻⁵. The photo-induced 1/f noise had α_LW-P = i_n/I_ph ∼ 5 × 10⁻⁶. The value of the noise-current-to-dark-current ratio, α appears to increase with increasing bandgap. It is not clear if this is due to different current mechanisms impacting 1/f noise performance. Measurements on detectors of different bandgaps are needed at temperatures where diffusion current is the dominant current. Excess low-frequency noise measurements made as a function of detector reverse bias indicate 1/f noise may result primarily from the dominant current mechanism at each particular bias. The 1/f noise was not a direct function of the applied bias.     

Evaluation and optimization of package processing and design through solder joint profile prediction

Solder joints are generated using a variety of methods to provide both mechanical and electrical connection for applications such as flip-chip, wafer level packaging, fine pitch, ball-grid array, and chip scale packages. Solder joint shape prediction has been incorporated as a key tool to aid in process development, wafer level and package level design and development, assembly, and reliability enhancement. This work demonstrates the application of an analytical model and the Surface Evolver software in analyzing a variety of solder processing methods and package types. Bump and joint shape prediction was conducted for the design of wafer level bumping, flip-chip assembly, and wafer level packaging. The results from the prediction methodologies are validated with experimentally measured geometries at each level of design.