Low-voltage high-gain differential OTA for SC circuits

A new differential operational transconductance amplifier (OTA) for SC circuits that operates with a supply voltage of less than two transistor threshold voltages is presented. Its simplicity relies on the use of a low-voltage regulated cascode circuit, which achieves very high output impedance under low-voltage restrictions. The OTA has been designed to operate with a supply voltage of V/sub DD/=1.5 V, using a 0.6 /spl mu/m CMOS technology with transistor threshold voltages of V/sub TN/=0.75 V and V/sub TP/=-0.85 V. Post-layout simulation results for a load capacitance (C/sub L/) of 2 pF show a 75 MHz gain-bandwidth product and 100 dB DC gain with a quiescent power consumption of 750 /spl mu/W.     

Low-Voltage Analog Circuits Based on Wideband Capacitive Coupling

A technique for wideband low-voltage analog circuit operation based on capacitive signal coupling is discussed. Circuits based on this technique do not show the GB degradation of other low-voltage approaches based on floating-gate transistors. The technique is validated with simulations of a new CMOS mixer and experimental results of a test chip in a 0.5 m CMOS technology.     

Low-power low-voltage differential class-AB OTAs for SC circuits

Two new differential class-AB operational transconductance amplifiers (OTAs) for SC circuits that operate with a supply voltage of less than two transistor threshold voltages are introduced. They make use of a new class-AB pseudodifferential pair to generate signal currents much larger than quiescent currents. Both OTAs have been designed to operate with a supply voltage of V/sub DD/=1.1 V, using a 0.35 /spl mu/m CMOS technology. Simulation results for a load capacitance (C/sub L/) of 1 pF show 15 MHz gain-bandwidth product with a quiescent power consumption of 10 /spl mu/W.     

1.1 V Low-Power ΣΔ Modulator for 14-bit, 16 KHz A/D Conversion Using a New Low-Voltage Class-AB Op-amp

This paper presents the implementation of a second order modulator for a 1.1 V supply voltage. A new class-AB CMOS operational amplifier has been designed in order to achieve high-resolution under very-low-voltage operation. The modulator has been implemented using a 0.35 m CMOS technology with 0.65 V transistor threshold voltage. Experimental results show 14 bits of resolution over 16 kHz nyquist rate with an oversampling ratio of 160.Fernando Muñoz Chavero was born in El Saucejo, Sevilla, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2002, respectively. Since 1997, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1999). His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion.Ramón González Carvajal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1995 and 1999, respectively. Since 1996, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1996), and Professor (2002). He has published more than 100 papers in International Journals and Conferences. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.Antonio Torralba was born in Seville, Spain. He received the electrical engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1983 and 1985, respectively. Since 1983, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Assistant professor, Associate Professor (1987), and Professor (1996). He has published 30 papers in journals and more than 80 papers in conferences. His research interests are in the design and modeling of low-voltage analog circuits, analog and mixed-signal design, analog to digital conversion, and electronic circuits and systems with application to control and communication.Jonathan Noel Tombs was born in Oxford, UK. He received the Electrical Engineering and Ph.D. degrees from Oxford University, UK, in 1987 and 1991, respectively. Since 1993, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1997), and Professor (2002). He has published more than 50 papers in International Journals and Conferences. His research interests are related to Digital Design and system verification with VHDL, low-voltage low-power analog circuit design, A/D and D/A conversion and analog and mixed signal processing.Jaime Ramírez-Angulo is currently Klipsch Distinguished Professor, IEEE fellow and Director of the Mixed-Signal VLSI lab at the Klipsch School of Electrical and Computer Engineering, New Mexico State University (Las Cruces, New Mexico), USA. He received a degree in Communications and Electronic Engineering (Professional degree), a M.S.E.E. from the National Polytechnic Institute in Mexico City and a Dr.-Ing. degree form the University of Stuttgart in Stuttgart, Germany in 1974, 1976 and 1982 respectively. He was professor at the National Institute for Astrophysics Optics and Electronics (INAOE) and at Texas A&M University. His research is related to various aspects of design and test of analog and mixed-signal Very Large Scale Integrated Circuits.     

Class AB Output Stages for Low Voltage CMOS Opamps with Accurate Quiescent Current Control by Means of Dynamic Biasing

Two new class AB output stages for CMOS op-amps are proposed with accurate quiescent current control. The second proposed stage also provides accurate control of the minimum current through the output transistors. The proposed stages can be operated with a supply voltage close to a transistor threshold voltage. A dynamic biasing scheme allows them to operate in a wide range of supply voltages. Using these stages two opamps have been designed using a 0.8 m CMOS technology. Experimental results show a unity gain frequency of 15 MHz with 290 A of quiescent current and a 10 pF load, using a 1.5 V single voltage supply.     

A novel autozeroing technique for flash Analog-to-Digital converters

This paper presents a new autozeroing technique that combines very high speed operation, low power consumption and low input switching interferences. This technique has been applied to the design and implementation of a 6-bit 0.13 μm CMOS flash Analog-to-Digital converter for Ultra-Wide Band applications. Simulation results show 5.76-bit at 1 GS/s with a power consumption of only 182 mW, validated with experimental measurements carried out with 3-bit circuit tiles of the 6-bit flash A/D converter.     

A Tunable Pseudo-Differential OTA With $-78~{hbox {dB}}$ THD Consuming 1.25 mW

A novel linear tunable transconductor based on a combination of linearization techniques is presented. The input signal is transferred to the V-I conversion element by means of a high-speed feedback loop. Then, the linear V-I conversion is accomplished using quasi-floating-gate MOS transistors biased in the triode region. Finally, the absence of current mirrors in the signal path provides low sensitivity to transistor mismatch and reduces the harmonic distortion. The operational transconductance amplifier (OTA) was fabricated in a 0.5-mum CMOS technology with a single 3.3-V supply voltage. Experimental results show a total harmonic distortion of -78 dB at 1 MHz with 1-V_pp input signal. High linearity of the OTA is obtained over a two octave tuning range with only 1.25-mW power consumption.     

Internally compensated LDO regulator based on the cascoded FVF

In this paper, an internally compensated low dropout (LDO) voltage regulator based on the Flipped Voltage Follower (FVF) is proposed. By means of capacitive coupling and dynamic biasing, the transient response to both load and line variations is enhanced. The proposed circuit has been designed and fabricated in a standard 0.5 µm CMOS technology. Experimental results show that the proposed circuit features a line and a load regulation of 132.04 µV/V and 153.53 µV/mA, respectively. Moreover, the output voltage spikes are kept under 150 mV for a 2 V-to-5 V supply variation and for 1 mA-to-100 mA load variation, both in 1 µs.     

Mesomorphism of ionic allylpalladium(II) complexes containing pz(R2)py as ligands and [BF4]-, [PF6]- or [CF3SO3]- as counteranions

The synthesis and thermal behaviour is reported of some ionic liquid-crystalline complexes formed when a mesogenic, two-chained, pyrazolylpyridine ligand is bound to a eta3-allylpalladium(II) fragment. The phase behaviour of the complexes is dominated by the formation of the SmA phase and, while the stability of the crystal phase appears to be controlled by intermolecular solid-state interactions, the stability of the liquid crystal phases is controlled by the length of the ligand alkoxy chains. Some of the complexes also show a complex polymorphism leading to the observation of double-melting behaviour.     

Mesomorphism of complexed 2,6-disubstituted pyridine ligands: crystal and molecular structure of two bent-core pyridines

Bent-core, polycatenar pyridines are reported, synthesized via a Siegrist coupling of di- and tri-alkoxybenzylidene fragments with 2,6-dimethylpyridine. None of these pyridines was liquid crystalline. Isomeric materials based on a 3,5-disubstituted pyridine core were mesomorphic in hydrogen-bonded complexes, whereas these new materials were not. However, the new pyridines did form mesomorphic metal complexes with silver salts. Some insight into this behaviour is gleaned from single crystal structure determinations of the model systems, 3,5-bis(3',4'-dimethoxystyryl)pyridine and 2,6-bis(3',4'-dimethoxystyryl)pyridine.