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201.
A Graphene Field-Effect Device 总被引:2,自引:0,他引:2
In this letter, a top-gated field-effect device (FED) manufactured from monolayer graphene is investigated. Except for graphene deposition, a conventional top-down CMOS-compatible process flow is applied. Carrier mobilities in graphene pseudo-MOS structures are compared to those obtained from the top-gated Graphene-FEDs. The extracted values exceed the universal mobility of silicon and silicon-on-insulator MOSFETs 相似文献
202.
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204.
R. L. Moreira P. Saint-Grgoire M. Lopez M. Latour 《Journal of Polymer Science.Polymer Physics》1989,27(3):709-722
The thermal and dielectric behaviors of poly(vinylidene fluoride-trifluoroethylene) copolymers near the ferroelectric-to-paraelectric phase transition are investigated for samples with 20, 25, 30, and 40 mol% trifluoroethylene (TrFE). The data suggest that the transition becomes continuous for a particular composition near 50 mol% TrFE. Experimental data are sensitive to thermal history (kinetics of crystallization, and kinetics and cycling over the structural transition). It is found that several anomalies are present at the structural change, and in particular the 30 mol% TrFE sample shows the most marked anomalies. These phenomena can be attributed to defects, but another possibility would be the existence of an intemediate supplementary phase. Both hypotheses are discussed. 相似文献
205.
In recent years there has emerged significant interest in low pressure radio frequency (rf) glow discharges which are used widely particulary in IC fabrication. Various parameters of the rf glow discharge have been found to be useful for its electrical characterization; however, there is no uniformity and agreement. Extensive experimental investigations on various discharge systems have shown, that the self-bias on the rf driven electrode, the complex conductivity and the breakdown characteristic are preferable parameters of rf discharges. Advantageously the self-bias and the complex conductivity should be presented in dependence on the pressure and the applied rf voltage. The discharge current cannot be measured quite accurately due to currents via leaky capacitors and the deviations from a sinusoidal form of the current due to nonlinearities. 相似文献
206.
207.
Nagle H.T. Fritzemeier R.R. Van Well J.E. McNamer M.G. 《Industrial Electronics, IEEE Transactions on》1989,36(2):151-163
As the level of microprocessor complexity increases to several hundred thousand transistors for a single-chip machine, it is becoming very difficult to test commercially available designs to the level of fault coverage desired by some customers. In order to achieve near 100-percent coverage of single stuck-at faults, future microprocessors must be designed with special testing features (designed for testability). The authors describe the testing problem for microprocessors, including the various methods of generating test sets and their application by the user. A survey of the testability features of some of today's commercially available microprocessors is presented. Suggestions for testability features for future-generation microprocessors are also discussed 相似文献
208.
The electro-optic response of ferroelectric smectic C* liquid crystals has been studied. Anomalous switching behaviour of such materials which possess a negative dielectric anisotropy has been reported. These materials show a minimum in response time at a sufficiently high field. We present results showing the dependency of this minimum upon spontaneous polarisation and the effect of AC bias. Calculations based upon the equation of motion of the director around the cone are presented which describe this effect and its dependence on the relative magnitudes of the spontaneous polarization and dielectric anisotropy of the material. Good agreement with the experimental results is found. 相似文献
209.
Blair J.D. Correale A. Jr. Cranford H.C. Dombrowski D.A. Erdelyi C.K. Hoffman C.R. Lamphere J.L. Lang K.W. Lee J.K. Mullen J.M. Norman V.R. Oakland S.F. 《Solid-State Circuits, IEEE Journal of》1989,24(6):1647-1655
The authors describe a 9.02×9.02-mm chip built in 1-μm CMOS with two levels of metal and an additional mask level for fabricating capacitors. It contains both analog and digital circuits and has provisions for self-test. The function includes the transmitter, receiver, protocol handler, an microprocessor, as well as interfaces for RAM/ROM storage, IBM PC bus, IBM PS/2 bus, IBM 3174 bus, and Motorola 68000 bus. The physical design terrains are formed by 24K circuits of standard cell gates, a 10K-circuit equivalent hand-honed custom microprocessor, and an analog macro. The chip operates from a single 5-V supply, and the power consumption is 0.8 W nominal at 16 Mb/s. The chip can also be operated at 4 Mb/s 相似文献
210.